# riscv::register::hedeleg - Rust
Hypervisor Exception Delegation Register.
Keywords: rust, rustlang, rust-lang, hedeleg

# Module riscv::register::hedeleg

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Expand description

Hypervisor Exception Delegation Register.

## Structs

Hedeleg

## Functions

clear_ex0 ⚠

Instruction address misaligned

clear_ex1 ⚠

Instruction access fault

clear_ex2 ⚠

Illegal instruction

clear_ex3 ⚠

Breakpoint

clear_ex4 ⚠

Load address misaligned

clear_ex5 ⚠

Load access fault

clear_ex6 ⚠

Store/AMO address misaligned

clear_ex7 ⚠

Store/AMO access fault

clear_ex8 ⚠

Environment call from U-mode or VU-mode

clear_ex12 ⚠

Instruction page fault

clear_ex13 ⚠

Load page fault

clear_ex15 ⚠

Store/AMO page fault

read

Reads the CSR

set_ex0 ⚠

Instruction address misaligned

set_ex1 ⚠

Instruction access fault

set_ex2 ⚠

Illegal instruction

set_ex3 ⚠

Breakpoint

set_ex4 ⚠

Load address misaligned

set_ex5 ⚠

Load access fault

set_ex6 ⚠

Store/AMO address misaligned

set_ex7 ⚠

Store/AMO access fault

set_ex8 ⚠

Environment call from U-mode or VU-mode

set_ex12 ⚠

Instruction page fault

set_ex13 ⚠

Load page fault

set_ex15 ⚠

Store/AMO page fault