# k210_pac::i2s0::ccr - Rust
Clock Configuration Register
Keywords: rust, rustlang, rust-lang, ccr

# Module k210_pac::i2s0::ccr

source · [−]
Expand description

Clock Configuration Register

## Structs

ALIGN_MODE_W

Write proxy for field `align_mode`

CLK_GATE_W

Write proxy for field `clk_gate`

CLK_WORD_SIZE_W

Write proxy for field `clk_word_size`

DMA_DIVIDE_16_W

Write proxy for field `dma_divide_16`

DMA_RX_EN_W

Write proxy for field `dma_rx_en`

DMA_TX_EN_W

Write proxy for field `dma_tx_en`

SIGN_EXPAND_EN_W

Write proxy for field `sign_expand_en`

## Enums

ALIGN_MODE_A

Alignment mode setting

CLK_GATE_A

Gating of sclk

CLK_WORD_SIZE_A

The number of sclk cycles for which the word select line stayd in the left aligned or right aligned mode

## Type Definitions

ALIGN_MODE_R

Reader of field `align_mode`

CLK_GATE_R

Reader of field `clk_gate`

CLK_WORD_SIZE_R

Reader of field `clk_word_size`

DMA_DIVIDE_16_R

Reader of field `dma_divide_16`

DMA_RX_EN_R

Reader of field `dma_rx_en`

DMA_TX_EN_R

Reader of field `dma_tx_en`

R

Reader of register ccr

SIGN_EXPAND_EN_R

Reader of field `sign_expand_en`

W

Writer for register ccr