Add boards/ && cargo clippy

pull/66/head
Yifan Wu 3 years ago
parent ec25d32cf9
commit cd03de03e4

@ -0,0 +1,3 @@
pub const CLOCK_FREQ: usize = 403000000 / 62;
pub const MEMORY_END: usize = 0x80600000;

@ -0,0 +1,3 @@
pub const CLOCK_FREQ: usize = 12500000;
pub const MEMORY_END: usize = 0x80800000;

@ -2,20 +2,11 @@ pub const USER_STACK_SIZE: usize = 4096 * 2;
pub const KERNEL_STACK_SIZE: usize = 4096 * 2;
pub const KERNEL_HEAP_SIZE: usize = 0x20_0000;
#[cfg(feature = "board_k210")]
pub const MEMORY_END: usize = 0x80600000;
#[cfg(feature = "board_qemu")]
pub const MEMORY_END: usize = 0x80800000;
pub const PAGE_SIZE: usize = 0x1000;
pub const PAGE_SIZE_BITS: usize = 0xc;
pub const TRAMPOLINE: usize = usize::MAX - PAGE_SIZE + 1;
pub const TRAP_CONTEXT: usize = TRAMPOLINE - PAGE_SIZE;
#[cfg(feature = "board_k210")]
pub const CLOCK_FREQ: usize = 403000000 / 62;
pub use crate::board::{CLOCK_FREQ, MEMORY_END};
#[cfg(feature = "board_qemu")]
pub const CLOCK_FREQ: usize = 12500000;

@ -35,7 +35,7 @@ lazy_static! {
unsafe {
for _ in 0..num_app {
let mut end = start;
while end.read_volatile() != '\0' as u8 {
while end.read_volatile() != b'\0' {
end = end.add(1);
}
let slice = core::slice::from_raw_parts(start, end as usize - start as usize);
@ -53,7 +53,7 @@ pub fn get_app_data_by_name(name: &str) -> Option<&'static [u8]> {
let num_app = get_num_app();
(0..num_app)
.find(|&i| APP_NAMES[i] == name)
.map(|i| get_app_data(i))
.map(get_app_data)
}
pub fn list_apps() {

@ -8,6 +8,13 @@ extern crate alloc;
#[macro_use]
extern crate bitflags;
#[cfg(feature = "board_k210")]
#[path = "boards/k210.rs"]
mod board;
#[cfg(not(any(feature = "board_k210")))]
#[path = "boards/qemu.rs"]
mod board;
#[macro_use]
mod console;
mod config;

@ -158,15 +158,15 @@ impl PhysAddr {
}
impl PhysPageNum {
pub fn get_pte_array(&self) -> &'static mut [PageTableEntry] {
let pa: PhysAddr = self.clone().into();
let pa: PhysAddr = (*self).into();
unsafe { core::slice::from_raw_parts_mut(pa.0 as *mut PageTableEntry, 512) }
}
pub fn get_bytes_array(&self) -> &'static mut [u8] {
let pa: PhysAddr = self.clone().into();
let pa: PhysAddr = (*self).into();
unsafe { core::slice::from_raw_parts_mut(pa.0 as *mut u8, 4096) }
}
pub fn get_mut<T>(&self) -> &'static mut T {
let pa: PhysAddr = self.clone().into();
let pa: PhysAddr = (*self).into();
pa.get_mut()
}
}

@ -72,7 +72,7 @@ impl FrameAllocator for StackFrameAllocator {
fn dealloc(&mut self, ppn: PhysPageNum) {
let ppn = ppn.0;
// validity check
if ppn >= self.current || self.recycled.iter().find(|&v| *v == ppn).is_some() {
if ppn >= self.current || self.recycled.iter().any(|&v| v == ppn) {
panic!("Frame ppn={:#x} has not been allocated!", ppn);
}
// recycle
@ -101,7 +101,7 @@ pub fn frame_alloc() -> Option<FrameTracker> {
FRAME_ALLOCATOR
.exclusive_access()
.alloc()
.map(|ppn| FrameTracker::new(ppn))
.map(FrameTracker::new)
}
fn frame_dealloc(ppn: PhysPageNum) {

@ -36,8 +36,8 @@ pub fn heap_test() {
for i in 0..500 {
v.push(i);
}
for i in 0..500 {
assert_eq!(v[i], i);
for (i, val) in v.iter().take(500).enumerate() {
assert_eq!(*val, i);
}
assert!(bss_range.contains(&(v.as_ptr() as usize)));
drop(v);

@ -297,11 +297,8 @@ impl MapArea {
page_table.map(vpn, ppn, pte_flags);
}
pub fn unmap_one(&mut self, page_table: &mut PageTable, vpn: VirtPageNum) {
match self.map_type {
MapType::Framed => {
self.data_frames.remove(&vpn);
}
_ => {}
if self.map_type == MapType::Framed {
self.data_frames.remove(&vpn);
}
page_table.unmap(vpn);
}
@ -360,29 +357,26 @@ pub fn remap_test() {
let mid_text: VirtAddr = ((stext as usize + etext as usize) / 2).into();
let mid_rodata: VirtAddr = ((srodata as usize + erodata as usize) / 2).into();
let mid_data: VirtAddr = ((sdata as usize + edata as usize) / 2).into();
assert_eq!(
kernel_space
assert!(
!kernel_space
.page_table
.translate(mid_text.floor())
.unwrap()
.writable(),
false
);
assert_eq!(
kernel_space
assert!(
!kernel_space
.page_table
.translate(mid_rodata.floor())
.unwrap()
.writable(),
false,
);
assert_eq!(
kernel_space
assert!(
!kernel_space
.page_table
.translate(mid_data.floor())
.unwrap()
.executable(),
false,
);
println!("remap_test passed!");
}

@ -77,8 +77,8 @@ impl PageTable {
let idxs = vpn.indexes();
let mut ppn = self.root_ppn;
let mut result: Option<&mut PageTableEntry> = None;
for i in 0..3 {
let pte = &mut ppn.get_pte_array()[idxs[i]];
for (i, idx) in idxs.iter().enumerate() {
let pte = &mut ppn.get_pte_array()[*idx];
if i == 2 {
result = Some(pte);
break;
@ -96,8 +96,8 @@ impl PageTable {
let idxs = vpn.indexes();
let mut ppn = self.root_ppn;
let mut result: Option<&mut PageTableEntry> = None;
for i in 0..3 {
let pte = &mut ppn.get_pte_array()[idxs[i]];
for (i, idx) in idxs.iter().enumerate() {
let pte = &mut ppn.get_pte_array()[*idx];
if i == 2 {
result = Some(pte);
break;
@ -122,7 +122,7 @@ impl PageTable {
*pte = PageTableEntry::empty();
}
pub fn translate(&self, vpn: VirtPageNum) -> Option<PageTableEntry> {
self.find_pte(vpn).map(|pte| pte.clone())
self.find_pte(vpn).map(|pte| *pte)
}
pub fn translate_va(&self, va: VirtAddr) -> Option<PhysAddr> {
self.find_pte(va.clone().floor()).map(|pte| {

@ -59,11 +59,10 @@ pub fn sys_waitpid(pid: isize, exit_code_ptr: *mut i32) -> isize {
// ---- access current TCB exclusively
let mut inner = task.inner_exclusive_access();
if inner
if !inner
.children
.iter()
.find(|p| pid == -1 || pid as usize == p.getpid())
.is_none()
.any(|p| pid == -1 || pid as usize == p.getpid())
{
return -1;
// ---- release current PCB

@ -3,6 +3,7 @@ mod manager;
mod pid;
mod processor;
mod switch;
#[allow(clippy::module_inception)]
mod task;
use crate::loader::get_app_data_by_name;

@ -27,7 +27,7 @@ impl PidAllocator {
pub fn dealloc(&mut self, pid: usize) {
assert!(pid < self.current);
assert!(
self.recycled.iter().find(|ppid| **ppid == pid).is_none(),
!self.recycled.iter().any(|ppid| *ppid == pid),
"pid {} has been deallocated!",
pid
);

@ -25,7 +25,7 @@ impl Processor {
self.current.take()
}
pub fn current(&self) -> Option<Arc<TaskControlBlock>> {
self.current.as_ref().map(|task| Arc::clone(task))
self.current.as_ref().map(Arc::clone)
}
}

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