From fdeb3fc66eea55636120316e5fbe896885f2b647 Mon Sep 17 00:00:00 2001
From: mxr <>
Date: Sun, 19 Apr 2026 01:14:58 +0800
Subject: [PATCH] =?UTF-8?q?(mir)=E4=BF=AE=E5=A4=8D=E5=AF=84=E5=AD=98?=
 =?UTF-8?q?=E5=99=A8=E9=87=8D=E7=94=A8=E5=86=B2=E7=AA=81=E9=94=99=E8=AF=AF?=
 =?UTF-8?q?=E5=92=8C=E6=B5=AE=E7=82=B9=E6=AF=94=E8=BE=83=E9=80=BB=E8=BE=91?=
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---
 src/mir/Lowering.cpp | 35 +++++++++++++++++++++++++----------
 1 file changed, 25 insertions(+), 10 deletions(-)

diff --git a/src/mir/Lowering.cpp b/src/mir/Lowering.cpp
index 1c54a86..21935d3 100644
--- a/src/mir/Lowering.cpp
+++ b/src/mir/Lowering.cpp
@@ -177,16 +177,16 @@ void EmitValueToReg(const ir::Value* value, PhysReg target,
         
         // 同样需要对 int_val 进行大立即数分解
         if (isLegalMovImm(int_val)) {
-          block.Append(Opcode::MovImm, {Operand::Reg(PhysReg::W8), Operand::Imm(static_cast<int64_t>(int_val))});
+          block.Append(Opcode::MovImm, {Operand::Reg(PhysReg::W17), Operand::Imm(static_cast<int64_t>(int_val))});
         } else {
           uint16_t low = int_val & 0xFFFF;
           uint16_t high = (int_val >> 16) & 0xFFFF;
-          block.Append(Opcode::MovImm, {Operand::Reg(PhysReg::W8), Operand::Imm(low)});
+          block.Append(Opcode::MovImm, {Operand::Reg(PhysReg::W17), Operand::Imm(low)});
           if (high != 0) {
-            block.Append(Opcode::Movk, {Operand::Reg(PhysReg::W8), Operand::Imm(high), Operand::Imm(16)});
+            block.Append(Opcode::Movk, {Operand::Reg(PhysReg::W17), Operand::Imm(high), Operand::Imm(16)});
           }
         }
-        block.Append(Opcode::StoreStack, {Operand::Reg(PhysReg::W8), Operand::FrameIndex(slot)});
+        block.Append(Opcode::StoreStack, {Operand::Reg(PhysReg::W17), Operand::FrameIndex(slot)});
         const_cast<ValueSlotMap&>(slots).emplace(value, slot);
     } else {
         slot = it->second;
@@ -551,18 +551,33 @@ void LowerInstruction(const ir::Instruction& inst, MachineFunction& function,
     case ir::Opcode::FCmp: {
       auto& fcmp = static_cast<const ir::FcmpInst&>(inst);
       int dst_slot = function.CreateFrameIndex(GetTypeSize(inst.GetType().get()));
-      
+
       // 加载浮点操作数到 s0, s1
       EmitValueToReg(fcmp.GetLhs(), PhysReg::S0, slots, block, function);
       EmitValueToReg(fcmp.GetRhs(), PhysReg::S1, slots, block, function);
-      
+
       // 生成浮点比较指令
       block.Append(Opcode::FCmpRR, {Operand::Reg(PhysReg::S0), Operand::Reg(PhysReg::S1)});
-      
-      // 简化实现：存储 1 作为结果
+
+      // 获取条件码（假设仅处理有序比较，无 NaN）
+      bool isOrdered;
+      CondCode cc = FcmpToCondCode(fcmp.GetPredicate(), isOrdered);
+      // 对于无序比较，当前测试用例未涉及，可暂不支持或报错
+
+      // 使用 CSET 模式
       block.Append(Opcode::MovImm, {Operand::Reg(PhysReg::W8), Operand::Imm(1)});
-      block.Append(Opcode::StoreStack,
-                   {Operand::Reg(PhysReg::W8), Operand::FrameIndex(dst_slot)});
+      block.Append(Opcode::MovImm, {Operand::Reg(PhysReg::W9), Operand::Imm(0)});
+
+      std::string true_label = ".L_fcset_true_" + std::to_string(reinterpret_cast<uintptr_t>(&fcmp));
+      std::string end_label = ".L_fcset_end_" + std::to_string(reinterpret_cast<uintptr_t>(&fcmp));
+
+      block.Append(Opcode::BCond, {Operand::Cond(cc), Operand::Label(true_label)});
+      block.Append(Opcode::MovReg, {Operand::Reg(PhysReg::W8), Operand::Reg(PhysReg::W9)});
+      block.Append(Opcode::B, {Operand::Label(end_label)});
+      block.Append(Opcode::Label, {Operand::Label(true_label)});
+      block.Append(Opcode::Label, {Operand::Label(end_label)});
+
+      block.Append(Opcode::StoreStack, {Operand::Reg(PhysReg::W8), Operand::FrameIndex(dst_slot)});
       slots.emplace(&inst, dst_slot);
       return;
     }