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#include "mir/MIR.h"
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#include <cstdint>
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#include <ostream>
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#include <stdexcept>
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#include "ir/IR.h"
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#include "utils/Log.h"
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namespace mir {
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namespace {
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const FrameSlot& GetFrameSlot(const MachineFunction& function,
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const Operand& operand) {
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if (operand.GetKind() != Operand::Kind::FrameIndex) {
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throw std::runtime_error(FormatError("mir", "期望 FrameIndex 操作数"));
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}
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return function.GetFrameSlot(operand.GetFrameIndex());
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}
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std::string LocalBlockLabel(const MachineFunction& function,
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const std::string& block_name) {
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return "." + function.GetName() + "." + block_name;
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}
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void PrintMoveImm32(std::ostream& os, PhysReg reg, int imm) {
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std::uint32_t u = static_cast<std::uint32_t>(imm);
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std::uint32_t lo = u & 0xFFFFu;
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std::uint32_t hi = (u >> 16) & 0xFFFFu;
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os << " movz " << PhysRegName(reg) << ", #" << lo << "\n";
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if (hi != 0) {
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os << " movk " << PhysRegName(reg) << ", #" << hi << ", lsl #16\n";
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}
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}
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void PrintStackAdjust(std::ostream& os, const char* mnemonic, int size) {
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if (size >= 0 && size <= 4095) {
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os << " " << mnemonic << " sp, sp, #" << size << "\n";
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return;
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}
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PrintMoveImm32(os, PhysReg::X10, size);
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os << " " << mnemonic << " sp, sp, x10\n";
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}
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void PrintAddrFromX29(std::ostream& os, PhysReg dst, int offset) {
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if (offset >= -4095 && offset <= 4095) {
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if (offset >= 0) {
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os << " add " << PhysRegName(dst) << ", x29, #" << offset << "\n";
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} else {
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os << " sub " << PhysRegName(dst) << ", x29, #" << (-offset) << "\n";
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}
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return;
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}
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// 使用 X11 而不是 X10，避免与数组索引偏移量冲突
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PrintMoveImm32(os, PhysReg::X11, offset < 0 ? -offset : offset);
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if (offset >= 0) {
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os << " add " << PhysRegName(dst) << ", x29, x11\n";
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} else {
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os << " sub " << PhysRegName(dst) << ", x29, x11\n";
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}
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}
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void PrintStackAccess(std::ostream& os, const char* mnemonic, PhysReg reg,
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int offset) {
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// AArch64 ldur/stur 只支持 -256..255 的立即数偏移
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if (offset >= -256 && offset <= 255) {
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os << " " << mnemonic << " " << PhysRegName(reg) << ", [x29, #" << offset
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<< "]\n";
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} else {
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// 大偏移：使用 x11 作为临时寄存器（X10 用于数组索引）
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bool is_load = (mnemonic[0] == 'l'); // ldur -> ldr
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const char* base_mnemonic = is_load ? "ldr" : "str";
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PrintAddrFromX29(os, PhysReg::X11, offset);
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os << " " << base_mnemonic << " " << PhysRegName(reg) << ", [x11]\n";
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}
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}
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const char* CondSuffix(ir::CmpOp cmp_op) {
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switch (cmp_op) {
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case ir::CmpOp::Eq:
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return "eq";
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case ir::CmpOp::Ne:
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return "ne";
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case ir::CmpOp::Lt:
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return "lt";
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case ir::CmpOp::Le:
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return "le";
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case ir::CmpOp::Gt:
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return "gt";
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case ir::CmpOp::Ge:
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return "ge";
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}
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return "eq";
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}
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// 浮点比较使用 IEEE 754 兼容的条件码（正确处理 NaN）
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const char* FloatCondSuffix(ir::CmpOp cmp_op) {
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switch (cmp_op) {
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case ir::CmpOp::Eq:
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return "eq"; // Z==1
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case ir::CmpOp::Ne:
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return "ne"; // Z==0
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case ir::CmpOp::Lt:
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return "mi"; // N==1 (minus, 正确处理 NaN)
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case ir::CmpOp::Le:
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return "ls"; // !(C==1 && Z==0) (lower or same, 正确处理 NaN)
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case ir::CmpOp::Gt:
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return "gt"; // Z==0 && N==V (已正确处理 NaN)
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case ir::CmpOp::Ge:
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return "ge"; // N==V (已正确处理 NaN)
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}
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return "eq";
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}
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} // namespace
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void PrintAsm(const MachineModule& module, std::ostream& os) {
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// 输出全局变量定义
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if (!module.GetGlobalVars().empty()) {
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os << ".data\n";
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for (const auto& [name, init_val, count, is_float, init_elems] :
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module.GetGlobalVars()) {
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(void)is_float;
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os << ".global " << name << "\n";
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os << ".type " << name << ", %object\n";
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os << name << ":\n";
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if (count == 1) {
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// 标量全局变量
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os << " .word " << init_val << "\n";
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} else {
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// 数组全局变量：优先输出显式初始化元素，剩余部分补零。
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int emitted = 0;
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for (int elem : init_elems) {
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if (emitted >= count) {
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break;
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}
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os << " .word " << elem << "\n";
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++emitted;
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}
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if (emitted == 0) {
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os << " .zero " << (count * 4) << "\n";
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} else if (emitted < count) {
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os << " .zero " << ((count - emitted) * 4) << "\n";
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}
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}
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}
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os << "\n";
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}
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os << ".text\n";
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for (const auto& func_ptr : module.GetFunctions()) {
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const auto& function = *func_ptr;
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os << ".global " << function.GetName() << "\n";
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os << ".type " << function.GetName() << ", %function\n";
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os << function.GetName() << ":\n";
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// 遍历所有基本块
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for (const auto& bb_ptr : function.GetBlocks()) {
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const auto& bb = *bb_ptr;
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// 打印块标签（entry 块不需要标签，因为函数名已经是标签了）
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if (bb.GetName() != "entry") {
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os << LocalBlockLabel(function, bb.GetName()) << ":\n";
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}
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for (const auto& inst : bb.GetInstructions()) {
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const auto& ops = inst.GetOperands();
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switch (inst.GetOpcode()) {
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case Opcode::Prologue:
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os << " stp x29, x30, [sp, #-16]!\n";
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os << " mov x29, sp\n";
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if (function.GetFrameSize() > 0) {
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PrintStackAdjust(os, "sub", function.GetFrameSize());
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}
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break;
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case Opcode::Epilogue:
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if (function.GetFrameSize() > 0) {
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PrintStackAdjust(os, "add", function.GetFrameSize());
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}
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os << " ldp x29, x30, [sp], #16\n";
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break;
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case Opcode::MovImm:
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PrintMoveImm32(os, ops.at(0).GetReg(), ops.at(1).GetImm());
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break;
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case Opcode::MovReg:
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os << " mov " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::FMovImm:
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// 通用浮点立即数：先装载 bit pattern，再位级移动到 s 寄存器。
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PrintMoveImm32(os, PhysReg::W10, ops.at(1).GetImm());
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os << " fmov " << PhysRegName(ops.at(0).GetReg()) << ", w10\n";
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break;
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case Opcode::FMovReg:
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os << " fmov " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::LoadStack: {
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const auto& slot = GetFrameSlot(function, ops.at(1));
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PrintStackAccess(os, "ldur", ops.at(0).GetReg(), slot.offset);
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break;
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}
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case Opcode::StoreStack: {
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const auto& slot = GetFrameSlot(function, ops.at(1));
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PrintStackAccess(os, "stur", ops.at(0).GetReg(), slot.offset);
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break;
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}
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case Opcode::LoadStackOffset: {
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// ops: reg, frame_index, imm_offset
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const auto& slot = GetFrameSlot(function, ops.at(1));
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int final_offset = slot.offset + ops.at(2).GetImm();
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PrintStackAccess(os, "ldur", ops.at(0).GetReg(), final_offset);
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break;
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}
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case Opcode::StoreStackOffset: {
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// ops: reg, frame_index, imm_offset
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const auto& slot = GetFrameSlot(function, ops.at(1));
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int final_offset = slot.offset + ops.at(2).GetImm();
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PrintStackAccess(os, "stur", ops.at(0).GetReg(), final_offset);
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break;
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}
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case Opcode::LoadStackAddr: {
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// ops: xN, frame_index
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// add xN, x29, #offset
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const auto& slot = GetFrameSlot(function, ops.at(1));
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PrintAddrFromX29(os, ops.at(0).GetReg(), slot.offset);
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break;
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}
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case Opcode::LoadIndirect: {
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// ops: wN, xM
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// ldr wN, [xM]
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os << " ldr " << PhysRegName(ops.at(0).GetReg()) << ", ["
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<< PhysRegName(ops.at(1).GetReg()) << "]\n";
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break;
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}
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case Opcode::StoreIndirect: {
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// ops: wN, xM
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// str wN, [xM]
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os << " str " << PhysRegName(ops.at(0).GetReg()) << ", ["
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<< PhysRegName(ops.at(1).GetReg()) << "]\n";
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break;
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}
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case Opcode::LoadGlobal: {
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// adrp x9, global_var
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// add x9, x9, :lo12:global_var
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// ldr wN, [x9]
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const std::string& name = ops.at(1).GetSymbol();
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os << " adrp x9, " << name << "\n";
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os << " add x9, x9, :lo12:" << name << "\n";
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os << " ldr " << PhysRegName(ops.at(0).GetReg()) << ", [x9]\n";
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break;
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}
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case Opcode::StoreGlobal: {
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// adrp x9, global_var
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// add x9, x9, :lo12:global_var
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// str wN, [x9]
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const std::string& name = ops.at(1).GetSymbol();
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os << " adrp x9, " << name << "\n";
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os << " add x9, x9, :lo12:" << name << "\n";
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os << " str " << PhysRegName(ops.at(0).GetReg()) << ", [x9]\n";
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break;
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}
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case Opcode::LoadGlobalAddr: {
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// adrp xN, global_var
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// add xN, xN, :lo12:global_var
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const std::string& name = ops.at(1).GetSymbol();
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os << " adrp " << PhysRegName(ops.at(0).GetReg()) << ", " << name << "\n";
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os << " add " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(0).GetReg()) << ", :lo12:" << name << "\n";
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break;
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}
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case Opcode::AddRI:
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os << " add " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", #"
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<< ops.at(2).GetImm() << "\n";
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break;
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case Opcode::SubRI:
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os << " sub " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", #"
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<< ops.at(2).GetImm() << "\n";
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break;
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case Opcode::AddRR:
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os << " add " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::AddRR_UXTW:
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// add xN, xM, wK, uxtw — 零扩展W寄存器后加到X寄存器
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os << " add " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << ", uxtw\n";
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break;
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case Opcode::SubRR:
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os << " sub " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::MulRR:
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os << " mul " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::DivRR:
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os << " sdiv " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FAddRR:
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os << " fadd " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FSubRR:
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os << " fsub " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FMulRR:
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os << " fmul " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FDivRR:
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os << " fdiv " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FSqrtRR:
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os << " fsqrt " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::SIToFP:
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os << " scvtf " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::FPToSI:
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os << " fcvtzs " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::ModRR:
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// 不应该出现（Mod 在 lowering 时已展开为 div+mul+sub）
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throw std::runtime_error(FormatError("mir", "ModRR 不应被打印"));
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case Opcode::LsrRI:
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os << " lsr " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", #"
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<< ops.at(2).GetImm() << "\n";
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break;
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case Opcode::LslRI:
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os << " lsl " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", #"
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<< ops.at(2).GetImm() << "\n";
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break;
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case Opcode::LslRR:
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os << " lsl " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::CmpOnlyRR:
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os << " cmp " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::FCmpOnlyRR:
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os << " fcmp " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::CmpRR: {
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// ops: dst, lhs, rhs, cmpop(imm)
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auto cmp_op = static_cast<ir::CmpOp>(ops.at(3).GetImm());
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os << " cmp " << PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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os << " cset " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< CondSuffix(cmp_op) << "\n";
|
|
|
break;
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}
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|
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case Opcode::FCmpRR: {
|
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// ops: dst(wN), lhs(sN), rhs(sN), cmpop(imm)
|
|
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auto cmp_op = static_cast<ir::CmpOp>(ops.at(3).GetImm());
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|
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os << " fcmp " << PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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|
|
os << " cset " << PhysRegName(ops.at(0).GetReg()) << ", "
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|
|
<< FloatCondSuffix(cmp_op) << "\n";
|
|
|
break;
|
|
|
}
|
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case Opcode::Bl:
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|
|
os << " bl " << ops.at(0).GetSymbol() << "\n";
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|
|
break;
|
|
|
case Opcode::B:
|
|
|
os << " b " << LocalBlockLabel(function, ops.at(0).GetSymbol())
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|
|
<< "\n";
|
|
|
break;
|
|
|
case Opcode::Cbnz:
|
|
|
os << " cbnz " << PhysRegName(ops.at(0).GetReg())
|
|
|
<< ", " << LocalBlockLabel(function, ops.at(1).GetSymbol())
|
|
|
<< "\n";
|
|
|
break;
|
|
|
case Opcode::Cbz:
|
|
|
os << " cbz " << PhysRegName(ops.at(0).GetReg())
|
|
|
<< ", " << LocalBlockLabel(function, ops.at(1).GetSymbol())
|
|
|
<< "\n";
|
|
|
break;
|
|
|
case Opcode::Bcond:
|
|
|
// ops: symbol, cmpop(imm)
|
|
|
os << " b." << CondSuffix(static_cast<ir::CmpOp>(ops.at(1).GetImm()))
|
|
|
<< " " << LocalBlockLabel(function, ops.at(0).GetSymbol())
|
|
|
<< "\n";
|
|
|
break;
|
|
|
case Opcode::FBcond:
|
|
|
// ops: symbol, cmpop(imm) - 浮点条件分支
|
|
|
os << " b." << FloatCondSuffix(static_cast<ir::CmpOp>(ops.at(1).GetImm()))
|
|
|
<< " " << LocalBlockLabel(function, ops.at(0).GetSymbol())
|
|
|
<< "\n";
|
|
|
break;
|
|
|
case Opcode::Ret:
|
|
|
os << " ret\n";
|
|
|
break;
|
|
|
}
|
|
|
}
|
|
|
}
|
|
|
|
|
|
os << ".size " << function.GetName() << ", .-" << function.GetName()
|
|
|
<< "\n\n";
|
|
|
}
|
|
|
}
|
|
|
|
|
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} // namespace mir
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