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2032 lines
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2032 lines
103 KiB
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
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</script>
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onkeydown="return searchBox.OnSearchSelectKey(event)">
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</div>
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<div class="title">Inspection API for IA-32 and Intel(R) 64 instructions<div class="ingroups"><a class="el" href="group__INS__BASIC__API.html">INS: Instruction Object</a></div></div> </div>
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</div><!--header-->
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<div class="contents">
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<table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
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Enumerations</h2></td></tr>
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<tr class="memitem:ga8463e477075bf4e42e56f40f18721532"><td class="memItemLeft" align="right" valign="top">enum  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga8463e477075bf4e42e56f40f18721532">LEVEL_BASE::PREDICATE_IA32</a> { <br />
|
|
  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a3ddeaab2116c5598bb12881a11b024cf">LEVEL_BASE::PREDICATE_ALWAYS_TRUE</a>,
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<br />
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  <b>PREDICATE_INVALID</b>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a7bfce3318d532775c035220479626e93">LEVEL_BASE::PREDICATE_BELOW</a>,
|
|
<br />
|
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a69000d1ed3a6900dec55009a99ddf08c">LEVEL_BASE::PREDICATE_BELOW_OR_EQUAL</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a37f44847a6433d7cfa950ff9249cdbba">LEVEL_BASE::PREDICATE_LESS</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a35112a002aa21724a461344e88ca80ff">LEVEL_BASE::PREDICATE_LESS_OR_EQUAL</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a169ccdee5ab41b60428e3be4cf25d94b">LEVEL_BASE::PREDICATE_NOT_BELOW</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a904767f1802081ca16f1b3f92c08b7de">LEVEL_BASE::PREDICATE_NOT_BELOW_OR_EQUAL</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a8f094827358ca808743c3fcbc56a0064">LEVEL_BASE::PREDICATE_NOT_LESS</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a7f31d64a17490995d1bfa69e8f195593">LEVEL_BASE::PREDICATE_NOT_LESS_OR_EQUAL</a>,
|
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a5a1bc040ea0eb51cbbfa96d26e50b1a1">LEVEL_BASE::PREDICATE_NOT_OVERFLOW</a>,
|
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<br />
|
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a2f55e58d26df683cd88054bb5a65d478">LEVEL_BASE::PREDICATE_NOT_PARITY</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a682744dcb2881bffe3bba56f29404340">LEVEL_BASE::PREDICATE_NOT_SIGN</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a829bb4ff4c4a84ddbe64ebd7dccaf241">LEVEL_BASE::PREDICATE_NOT_ZERO</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532aecfa789ba47f82d4f0271abedcab4ca3">LEVEL_BASE::PREDICATE_OVERFLOW</a>,
|
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<br />
|
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a038811c11be5e196ae0a4b4bde26c672">LEVEL_BASE::PREDICATE_PARITY</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a4fdd163dca305588f70801f59d5083b8">LEVEL_BASE::PREDICATE_SIGN</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532afff140c4f242e8bcd569e9b0db0d8326">LEVEL_BASE::PREDICATE_ZERO</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532adba0fdb3ab28203a092c9c44af532345">LEVEL_BASE::PREDICATE_CX_NON_ZERO</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a3d1f28ea7febf96a1feaf30f591e79b8">LEVEL_BASE::PREDICATE_ECX_NON_ZERO</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532a6d2fb0c448223b757fecf9e9034381b2">LEVEL_BASE::PREDICATE_RCX_NON_ZERO</a>,
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<br />
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  <a class="el" href="group__INS__BASIC__API__IA32.html#gga8463e477075bf4e42e56f40f18721532aa687080a6c2019b7bfadb9f3b45684c3">LEVEL_BASE::PREDICATE_SAVED_GCX_NON_ZERO</a>,
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<br />
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  <b>PREDICATE_LAST</b>
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<br />
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}</td></tr>
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<tr class="separator:ga8463e477075bf4e42e56f40f18721532"><td class="memSeparator" colspan="2"> </td></tr>
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</table><table class="memberdecls">
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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Functions</h2></td></tr>
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<tr class="memitem:ga73446270f46cfe66d3439d49277e346e"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga73446270f46cfe66d3439d49277e346e">LEVEL_CORE::INS_HasRealRep</a> (INS ins)</td></tr>
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<tr class="separator:ga73446270f46cfe66d3439d49277e346e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga2b685b5e8b997ba224e975eeb701eba9"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga2b685b5e8b997ba224e975eeb701eba9">LEVEL_CORE::INS_IsStandardMemop</a> (INS ins)</td></tr>
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<tr class="separator:ga2b685b5e8b997ba224e975eeb701eba9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga828256a116051c3165edf3445da7d9ee"><td class="memItemLeft" align="right" valign="top">UINT32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga828256a116051c3165edf3445da7d9ee">LEVEL_CORE::INS_EffectiveAddressWidth</a> (INS ins)</td></tr>
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<tr class="separator:ga828256a116051c3165edf3445da7d9ee"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6066befa9365475b2a1b967a0a7118be"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga6066befa9365475b2a1b967a0a7118be">LEVEL_CORE::INS_IsSysenter</a> (INS ins)</td></tr>
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<tr class="separator:ga6066befa9365475b2a1b967a0a7118be"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabcc0207eb241a0abd94249fcee88988d"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gabcc0207eb241a0abd94249fcee88988d">LEVEL_CORE::INS_IsXbegin</a> (INS ins)</td></tr>
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<tr class="separator:gabcc0207eb241a0abd94249fcee88988d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6faaec1f35334a9b0ad2d4044718591b"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga6faaec1f35334a9b0ad2d4044718591b">LEVEL_CORE::INS_IsXend</a> (INS ins)</td></tr>
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<tr class="separator:ga6faaec1f35334a9b0ad2d4044718591b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf03d73a57bec3baec06a91713696910d"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gaf03d73a57bec3baec06a91713696910d">LEVEL_CORE::INS_IsHalt</a> (INS ins)</td></tr>
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<tr class="separator:gaf03d73a57bec3baec06a91713696910d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad4b326ad064332cb29444a14afbffacb"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gad4b326ad064332cb29444a14afbffacb">LEVEL_CORE::INS_IsPcMaterialization</a> (INS ins)</td></tr>
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<tr class="separator:gad4b326ad064332cb29444a14afbffacb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga77bfb2f7fc130ce80fb8b1c9f7ecd83b"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga77bfb2f7fc130ce80fb8b1c9f7ecd83b">LEVEL_CORE::INS_IsFarCall</a> (INS ins)</td></tr>
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<tr class="separator:ga77bfb2f7fc130ce80fb8b1c9f7ecd83b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae63d4680179c8b978faa8d1bccdcae24"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gae63d4680179c8b978faa8d1bccdcae24">LEVEL_CORE::INS_IsFarJump</a> (INS ins)</td></tr>
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<tr class="separator:gae63d4680179c8b978faa8d1bccdcae24"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56bafd9886322b6c482c45558f17631e"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga56bafd9886322b6c482c45558f17631e">LEVEL_CORE::INS_IsDirectFarJump</a> (INS ins)</td></tr>
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<tr class="separator:ga56bafd9886322b6c482c45558f17631e"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gade39ed3152b53757555c8d44037fd9c0"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gade39ed3152b53757555c8d44037fd9c0">LEVEL_CORE::INS_IsVgather</a> (INS ins)</td></tr>
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<tr class="separator:gade39ed3152b53757555c8d44037fd9c0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga44961b904fc7b63d530c9f2a2cd49254"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga44961b904fc7b63d530c9f2a2cd49254">LEVEL_CORE::INS_IsVscatter</a> (INS ins)</td></tr>
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<tr class="separator:ga44961b904fc7b63d530c9f2a2cd49254"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7fca105e9ec6a3014e5d0572533303a7"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga7fca105e9ec6a3014e5d0572533303a7">LEVEL_CORE::INS_HasMemoryVector</a> (INS ins)</td></tr>
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<tr class="separator:ga7fca105e9ec6a3014e5d0572533303a7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga82f8aa280ad2a806ba6bdb89a8953577"><td class="memItemLeft" align="right" valign="top">VOID </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga82f8aa280ad2a806ba6bdb89a8953577">LEVEL_CORE::INS_GetFarPointer</a> (INS ins, UINT16 &segment_selector, UINT32 &displacement)</td></tr>
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<tr class="separator:ga82f8aa280ad2a806ba6bdb89a8953577"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6cf7160e287f950809a55082ef73c3bd"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga6cf7160e287f950809a55082ef73c3bd">LEVEL_CORE::INS_IsInterrupt</a> (INS ins)</td></tr>
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<tr class="separator:ga6cf7160e287f950809a55082ef73c3bd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8d46c0d7ba082a1e9cf73c82dbbb5682"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga8d46c0d7ba082a1e9cf73c82dbbb5682">LEVEL_CORE::INS_IsFarRet</a> (INS ins)</td></tr>
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<tr class="separator:ga8d46c0d7ba082a1e9cf73c82dbbb5682"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac92624287c08122315352e5a061d70d7"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gac92624287c08122315352e5a061d70d7">LEVEL_CORE::INS_IsSub</a> (const INS ins)</td></tr>
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<tr class="separator:gac92624287c08122315352e5a061d70d7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga41886f09ab9dd83bc3285da382c819fa"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga41886f09ab9dd83bc3285da382c819fa">LEVEL_CORE::INS_IsMov</a> (const INS ins)</td></tr>
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<tr class="separator:ga41886f09ab9dd83bc3285da382c819fa"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga0bdd0dcaa054f9e2a67c3278e1397418"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga0bdd0dcaa054f9e2a67c3278e1397418">LEVEL_CORE::INS_IsMovFullRegRegSame</a> (const INS ins)</td></tr>
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<tr class="separator:ga0bdd0dcaa054f9e2a67c3278e1397418"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga75c03a468b13754fc23bbd5aac78cc39"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga75c03a468b13754fc23bbd5aac78cc39">LEVEL_CORE::INS_IsRDTSC</a> (const INS ins)</td></tr>
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<tr class="separator:ga75c03a468b13754fc23bbd5aac78cc39"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga98dbbb7087d422f3e9fccdc5598e94ef"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga98dbbb7087d422f3e9fccdc5598e94ef">LEVEL_CORE::INS_IsMaskMov</a> (const INS ins)</td></tr>
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<tr class="separator:ga98dbbb7087d422f3e9fccdc5598e94ef"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8c243487db5a05e7410602ddd7087776"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga8c243487db5a05e7410602ddd7087776">LEVEL_CORE::INS_RepCountRegister</a> (INS ins)</td></tr>
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<tr class="separator:ga8c243487db5a05e7410602ddd7087776"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga55dd036dd7f0c36afc85ac5125385e43"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga55dd036dd7f0c36afc85ac5125385e43">LEVEL_CORE::INS_SegmentRegPrefix</a> (INS ins)</td></tr>
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<tr class="separator:ga55dd036dd7f0c36afc85ac5125385e43"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaef274dae710e4ff007b48e0b89bd70c1"><td class="memItemLeft" align="right" valign="top">VOID </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gaef274dae710e4ff007b48e0b89bd70c1">LEVEL_CORE::PIN_SetSyntaxIntel</a> ()</td></tr>
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<tr class="separator:gaef274dae710e4ff007b48e0b89bd70c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga19720fbed396bde822170f82c212d32c"><td class="memItemLeft" align="right" valign="top">VOID </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga19720fbed396bde822170f82c212d32c">LEVEL_CORE::PIN_SetSyntaxATT</a> ()</td></tr>
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<tr class="separator:ga19720fbed396bde822170f82c212d32c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae72d6505d5d9310b73cc6aa905252bd6"><td class="memItemLeft" align="right" valign="top">VOID </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gae72d6505d5d9310b73cc6aa905252bd6">LEVEL_CORE::PIN_SetSyntaxXED</a> ()</td></tr>
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<tr class="separator:gae72d6505d5d9310b73cc6aa905252bd6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga49d7509b93ae841c3db0025c3ad30484"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga49d7509b93ae841c3db0025c3ad30484">LEVEL_CORE::INS_SegPrefixIsMemoryRead</a> (INS ins)</td></tr>
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<tr class="separator:ga49d7509b93ae841c3db0025c3ad30484"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga16a0013b27d7a19bdb77c956864993c6"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga16a0013b27d7a19bdb77c956864993c6">LEVEL_CORE::INS_SegPrefixIsMemoryWrite</a> (INS ins)</td></tr>
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<tr class="separator:ga16a0013b27d7a19bdb77c956864993c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga15af367a66fab615c539b1e56aecb664"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga15af367a66fab615c539b1e56aecb664">LEVEL_CORE::INS_AddressSizePrefix</a> (INS ins)</td></tr>
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<tr class="separator:ga15af367a66fab615c539b1e56aecb664"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gabd34d9d3cd7992562a01c08798948488"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gabd34d9d3cd7992562a01c08798948488">LEVEL_CORE::INS_BranchNotTakenPrefix</a> (INS ins)</td></tr>
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<tr class="separator:gabd34d9d3cd7992562a01c08798948488"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae651533b1e67523f5499276372c0a5f4"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gae651533b1e67523f5499276372c0a5f4">LEVEL_CORE::INS_BranchTakenPrefix</a> (INS ins)</td></tr>
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<tr class="separator:gae651533b1e67523f5499276372c0a5f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae2acdb42debd825cb55d0ed20b659a17"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gae2acdb42debd825cb55d0ed20b659a17">LEVEL_CORE::INS_LockPrefix</a> (INS ins)</td></tr>
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<tr class="separator:gae2acdb42debd825cb55d0ed20b659a17"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga56bc844ef8d18730314ec1d26222b77d"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga56bc844ef8d18730314ec1d26222b77d">LEVEL_CORE::INS_OperandSizePrefix</a> (INS ins)</td></tr>
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<tr class="separator:ga56bc844ef8d18730314ec1d26222b77d"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga375b7054588735c5c435a79cc2f036dc"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga375b7054588735c5c435a79cc2f036dc">LEVEL_CORE::INS_RepPrefix</a> (INS ins)</td></tr>
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<tr class="separator:ga375b7054588735c5c435a79cc2f036dc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad540956e542c9ab83a2675f68524d442"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gad540956e542c9ab83a2675f68524d442">LEVEL_CORE::INS_RepnePrefix</a> (INS ins)</td></tr>
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<tr class="separator:gad540956e542c9ab83a2675f68524d442"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga766eb1444c60df4f1fa8690ac21461c7"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga766eb1444c60df4f1fa8690ac21461c7">LEVEL_CORE::INS_SegmentPrefix</a> (INS ins)</td></tr>
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<tr class="separator:ga766eb1444c60df4f1fa8690ac21461c7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga757877869fb48ffb99b18630d6a4c1cc"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga757877869fb48ffb99b18630d6a4c1cc">LEVEL_CORE::INS_IsXchg</a> (INS ins)</td></tr>
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<tr class="separator:ga757877869fb48ffb99b18630d6a4c1cc"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1949ef72fed614c95fc1088aa2e41677"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga1949ef72fed614c95fc1088aa2e41677">LEVEL_CORE::INS_IsStringop</a> (INS ins)</td></tr>
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<tr class="separator:ga1949ef72fed614c95fc1088aa2e41677"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab92dbfefabfeb3d4108e412b04383652"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gab92dbfefabfeb3d4108e412b04383652">LEVEL_CORE::INS_IsIRet</a> (INS ins)</td></tr>
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<tr class="separator:gab92dbfefabfeb3d4108e412b04383652"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gac0601b32cd3d7c7c849df994729ce948"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gac0601b32cd3d7c7c849df994729ce948">LEVEL_CORE::INS_FullRegRContain</a> (const INS ins, const REG reg)</td></tr>
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<tr class="separator:gac0601b32cd3d7c7c849df994729ce948"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gad53e348699db7a82ce5dc972a9fabe23"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gad53e348699db7a82ce5dc972a9fabe23">LEVEL_CORE::INS_FullRegWContain</a> (const INS ins, const REG reg)</td></tr>
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<tr class="separator:gad53e348699db7a82ce5dc972a9fabe23"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5f0ef7c1538ed615dc665e32dd269ae4"><td class="memItemLeft" align="right" valign="top">ADDRDELTA </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga5f0ef7c1538ed615dc665e32dd269ae4">LEVEL_CORE::INS_MemoryDisplacement</a> (INS ins)</td></tr>
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<tr class="separator:ga5f0ef7c1538ed615dc665e32dd269ae4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga187b385a60d62c5f42b0744eef498549"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga187b385a60d62c5f42b0744eef498549">LEVEL_CORE::INS_MemoryBaseReg</a> (INS ins)</td></tr>
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<tr class="separator:ga187b385a60d62c5f42b0744eef498549"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga63b94dcdda308885fd08d11321c90056"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga63b94dcdda308885fd08d11321c90056">LEVEL_CORE::INS_MemoryIndexReg</a> (INS ins)</td></tr>
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<tr class="separator:ga63b94dcdda308885fd08d11321c90056"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga46b6f625d021faccc7a04b3359acb787"><td class="memItemLeft" align="right" valign="top">UINT32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga46b6f625d021faccc7a04b3359acb787">LEVEL_CORE::INS_MemoryScale</a> (INS ins)</td></tr>
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<tr class="separator:ga46b6f625d021faccc7a04b3359acb787"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga286e936047a0257324b948dce216b8eb"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga286e936047a0257324b948dce216b8eb">LEVEL_CORE::INS_hasKnownMemorySize</a> (INS ins)</td></tr>
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<tr class="separator:ga286e936047a0257324b948dce216b8eb"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga6b8be690351c9484ab4558cad1564ddd"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga6b8be690351c9484ab4558cad1564ddd">LEVEL_CORE::INS_ChangeReg</a> (const INS ins, const REG old_reg, const REG new_reg, const BOOL as_read)</td></tr>
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<tr class="separator:ga6b8be690351c9484ab4558cad1564ddd"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaf5943ec0aff99ac7a8eb50372a4f37c6"><td class="memItemLeft" align="right" valign="top">UINT32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gaf5943ec0aff99ac7a8eb50372a4f37c6">LEVEL_CORE::INS_OperandCount</a> (INS ins)</td></tr>
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<tr class="separator:gaf5943ec0aff99ac7a8eb50372a4f37c6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaae06a0b3032a568c2ed8452ad4148e45"><td class="memItemLeft" align="right" valign="top"><a id="gaae06a0b3032a568c2ed8452ad4148e45"></a>
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UINT32 </td><td class="memItemRight" valign="bottom"><b>LEVEL_CORE::INS_OperandNameId</b> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:gaae06a0b3032a568c2ed8452ad4148e45"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae3250a73461f2f78b3ce333ca3d1a7da"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gae3250a73461f2f78b3ce333ca3d1a7da">LEVEL_CORE::INS_OperandIsMemory</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:gae3250a73461f2f78b3ce333ca3d1a7da"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga7a47b680da19110e853ca057f384d5d9"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga7a47b680da19110e853ca057f384d5d9">LEVEL_CORE::INS_OperandMemoryBaseReg</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga7a47b680da19110e853ca057f384d5d9"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa48124a54af38b96b06f195b64c88da7"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gaa48124a54af38b96b06f195b64c88da7">LEVEL_CORE::INS_OperandMemoryIndexReg</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:gaa48124a54af38b96b06f195b64c88da7"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1e34616a317e5f4421ddb058e9fc06c8"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga1e34616a317e5f4421ddb058e9fc06c8">LEVEL_CORE::INS_OperandMemorySegmentReg</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga1e34616a317e5f4421ddb058e9fc06c8"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga261f86ca702ffee5be4fbe882598bfa6"><td class="memItemLeft" align="right" valign="top">UINT32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga261f86ca702ffee5be4fbe882598bfa6">LEVEL_CORE::INS_OperandMemoryScale</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga261f86ca702ffee5be4fbe882598bfa6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga513e73d8eb1112053fc09912c44a90a0"><td class="memItemLeft" align="right" valign="top">ADDRDELTA </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga513e73d8eb1112053fc09912c44a90a0">LEVEL_CORE::INS_OperandMemoryDisplacement</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga513e73d8eb1112053fc09912c44a90a0"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga05b97b98fde0546de52b748660d1ef46"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga05b97b98fde0546de52b748660d1ef46">LEVEL_CORE::INS_OperandIsFixedMemop</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga05b97b98fde0546de52b748660d1ef46"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga74e6cb6d549d3bbe01b0436a4e0d5e61"><td class="memItemLeft" align="right" valign="top"><a id="ga74e6cb6d549d3bbe01b0436a4e0d5e61"></a>
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VOID </td><td class="memItemRight" valign="bottom"><b>LEVEL_CORE::GetNumberAndSizeOfMemAccesses</b> (INS ins, int *numAccesses, int *accessSize, int *indexSize)</td></tr>
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<tr class="separator:ga74e6cb6d549d3bbe01b0436a4e0d5e61"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0b51cf908a5c032a1fbb01c4be319f4"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gae0b51cf908a5c032a1fbb01c4be319f4">LEVEL_CORE::INS_OperandIsBranchDisplacement</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:gae0b51cf908a5c032a1fbb01c4be319f4"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga1ad98add40186fb49b15fc05fdedb365"><td class="memItemLeft" align="right" valign="top">UINT32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga1ad98add40186fb49b15fc05fdedb365">LEVEL_CORE::INS_MemoryOperandIndexToOperandIndex</a> (INS ins, UINT32 memopIdx)</td></tr>
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<tr class="separator:ga1ad98add40186fb49b15fc05fdedb365"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga47e1a53b42fde8d1206482e17d7545ed"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga47e1a53b42fde8d1206482e17d7545ed">LEVEL_CORE::INS_OperandIsReg</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga47e1a53b42fde8d1206482e17d7545ed"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga3a66cc7d453dfbc9b832e16cd1db21c1"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga3a66cc7d453dfbc9b832e16cd1db21c1">LEVEL_CORE::INS_OperandIsSegmentReg</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga3a66cc7d453dfbc9b832e16cd1db21c1"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga8392f6469bf5e04b59b390fa5b433918"><td class="memItemLeft" align="right" valign="top">REG </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga8392f6469bf5e04b59b390fa5b433918">LEVEL_CORE::INS_OperandReg</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga8392f6469bf5e04b59b390fa5b433918"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga27b51bab8782f669d2972faa3ea66ed6"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga27b51bab8782f669d2972faa3ea66ed6">LEVEL_CORE::INS_OperandIsImmediate</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga27b51bab8782f669d2972faa3ea66ed6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga79708c8843083389c1572bdb2f4d2f57"><td class="memItemLeft" align="right" valign="top">UINT64 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga79708c8843083389c1572bdb2f4d2f57">LEVEL_CORE::INS_OperandImmediate</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga79708c8843083389c1572bdb2f4d2f57"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gae0128a829ec3f93086b1f156fe88e90c"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gae0128a829ec3f93086b1f156fe88e90c">LEVEL_CORE::INS_OperandIsImplicit</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:gae0128a829ec3f93086b1f156fe88e90c"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gab06012050e687c4545d28b0d0cecd41b"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gab06012050e687c4545d28b0d0cecd41b">LEVEL_CORE::INS_RegIsImplicit</a> (INS ins, REG reg)</td></tr>
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<tr class="separator:gab06012050e687c4545d28b0d0cecd41b"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga800e25c6e0d5e8d07d28c3699e06dca6"><td class="memItemLeft" align="right" valign="top">UINT32 </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga800e25c6e0d5e8d07d28c3699e06dca6">LEVEL_CORE::INS_OperandWidth</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga800e25c6e0d5e8d07d28c3699e06dca6"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga4823eacf073639e40111fc11c9031a69"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga4823eacf073639e40111fc11c9031a69">LEVEL_CORE::INS_OperandRead</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga4823eacf073639e40111fc11c9031a69"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaee8b4563d235f03f157af299c399bedf"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gaee8b4563d235f03f157af299c399bedf">LEVEL_CORE::INS_OperandWritten</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:gaee8b4563d235f03f157af299c399bedf"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga5350f8a716ad5631f25e44b0396b7d01"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga5350f8a716ad5631f25e44b0396b7d01">LEVEL_CORE::INS_OperandReadOnly</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga5350f8a716ad5631f25e44b0396b7d01"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:gaa674e8402286e4ac35a911875e748814"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#gaa674e8402286e4ac35a911875e748814">LEVEL_CORE::INS_OperandWrittenOnly</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:gaa674e8402286e4ac35a911875e748814"><td class="memSeparator" colspan="2"> </td></tr>
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<tr class="memitem:ga86dc893a3b505e66181bfb1566b1ffb7"><td class="memItemLeft" align="right" valign="top">BOOL </td><td class="memItemRight" valign="bottom"><a class="el" href="group__INS__BASIC__API__IA32.html#ga86dc893a3b505e66181bfb1566b1ffb7">LEVEL_CORE::INS_OperandReadAndWritten</a> (INS ins, UINT32 n)</td></tr>
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<tr class="separator:ga86dc893a3b505e66181bfb1566b1ffb7"><td class="memSeparator" colspan="2"> </td></tr>
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</table>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
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<p>Functions to examine IA-32 and Intel(R) 64 instructions.</p>
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<dl class="section user"><dt>Availability:</dt><dd><b>Mode:</b> JIT & Probe<br />
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<b>O/S</b>: Linux & Windows<br />
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<b>CPU:</b> IA-32 and Intel(R) 64 architectures<br />
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</dd></dl>
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<h2 class="groupheader">Enumeration Type Documentation</h2>
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<a id="ga8463e477075bf4e42e56f40f18721532"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga8463e477075bf4e42e56f40f18721532">◆ </a></span>PREDICATE_IA32</h2>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">enum <a class="el" href="group__INS__BASIC__API__IA32.html#ga8463e477075bf4e42e56f40f18721532">LEVEL_BASE::PREDICATE_IA32</a></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Predicate abstraction for IA-32 and Intel(R) 64 instructions. </p>
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<table class="fieldtable">
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<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a3ddeaab2116c5598bb12881a11b024cf"></a>PREDICATE_ALWAYS_TRUE </td><td class="fielddoc"><p>Default predication on IA-32 and Intel(R) 64 architectures. </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a7bfce3318d532775c035220479626e93"></a>PREDICATE_BELOW </td><td class="fielddoc"><p>Below (CF==1) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a69000d1ed3a6900dec55009a99ddf08c"></a>PREDICATE_BELOW_OR_EQUAL </td><td class="fielddoc"><p>Below or Equal (CF==1 or ZF==1) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a37f44847a6433d7cfa950ff9249cdbba"></a>PREDICATE_LESS </td><td class="fielddoc"><p>Less (SF!=OF) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a35112a002aa21724a461344e88ca80ff"></a>PREDICATE_LESS_OR_EQUAL </td><td class="fielddoc"><p>Less or Equal (ZF==1 or SF!=OF) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a169ccdee5ab41b60428e3be4cf25d94b"></a>PREDICATE_NOT_BELOW </td><td class="fielddoc"><p>Not Below (CF==0) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a904767f1802081ca16f1b3f92c08b7de"></a>PREDICATE_NOT_BELOW_OR_EQUAL </td><td class="fielddoc"><p>Above (CF==0 and ZF==0) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a8f094827358ca808743c3fcbc56a0064"></a>PREDICATE_NOT_LESS </td><td class="fielddoc"><p>Greater or Equal (SF==OF) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a7f31d64a17490995d1bfa69e8f195593"></a>PREDICATE_NOT_LESS_OR_EQUAL </td><td class="fielddoc"><p>Greater (ZF==0 and SF==OF) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a5a1bc040ea0eb51cbbfa96d26e50b1a1"></a>PREDICATE_NOT_OVERFLOW </td><td class="fielddoc"><p>Not Overflow (OF==0) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a2f55e58d26df683cd88054bb5a65d478"></a>PREDICATE_NOT_PARITY </td><td class="fielddoc"><p>Not Parity (PF==0) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a682744dcb2881bffe3bba56f29404340"></a>PREDICATE_NOT_SIGN </td><td class="fielddoc"><p>Not Sign (SF==0) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a829bb4ff4c4a84ddbe64ebd7dccaf241"></a>PREDICATE_NOT_ZERO </td><td class="fielddoc"><p>Not Zero (ZF==0) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532aecfa789ba47f82d4f0271abedcab4ca3"></a>PREDICATE_OVERFLOW </td><td class="fielddoc"><p>Overflow (OF==1) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a038811c11be5e196ae0a4b4bde26c672"></a>PREDICATE_PARITY </td><td class="fielddoc"><p>Parity (PF==1) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a4fdd163dca305588f70801f59d5083b8"></a>PREDICATE_SIGN </td><td class="fielddoc"><p>Sign (SF==1) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532afff140c4f242e8bcd569e9b0db0d8326"></a>PREDICATE_ZERO </td><td class="fielddoc"><p>Zero (ZF==1) </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532adba0fdb3ab28203a092c9c44af532345"></a>PREDICATE_CX_NON_ZERO </td><td class="fielddoc"><p>CX != 0. </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a3d1f28ea7febf96a1feaf30f591e79b8"></a>PREDICATE_ECX_NON_ZERO </td><td class="fielddoc"><p>ECX != 0. </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532a6d2fb0c448223b757fecf9e9034381b2"></a>PREDICATE_RCX_NON_ZERO </td><td class="fielddoc"><p>RCX != 0. </p>
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</td></tr>
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<tr><td class="fieldname"><a id="gga8463e477075bf4e42e56f40f18721532aa687080a6c2019b7bfadb9f3b45684c3"></a>PREDICATE_SAVED_GCX_NON_ZERO </td><td class="fielddoc"><p>(Internal) Use the saved value of one of the previous three tests </p>
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</td></tr>
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</table>
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|
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</div>
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</div>
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<h2 class="groupheader">Function Documentation</h2>
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<a id="ga15af367a66fab615c539b1e56aecb664"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga15af367a66fab615c539b1e56aecb664">◆ </a></span>INS_AddressSizePrefix()</h2>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">BOOL LEVEL_CORE::INS_AddressSizePrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has an address size prefix. </dd></dl>
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</div>
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</div>
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<a id="gabd34d9d3cd7992562a01c08798948488"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gabd34d9d3cd7992562a01c08798948488">◆ </a></span>INS_BranchNotTakenPrefix()</h2>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">BOOL LEVEL_CORE::INS_BranchNotTakenPrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has an branch not taken hint prefix </dd></dl>
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</div>
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</div>
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<a id="gae651533b1e67523f5499276372c0a5f4"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gae651533b1e67523f5499276372c0a5f4">◆ </a></span>INS_BranchTakenPrefix()</h2>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">BOOL LEVEL_CORE::INS_BranchTakenPrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has an branch taken hint prefix </dd></dl>
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</div>
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</div>
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<a id="ga6b8be690351c9484ab4558cad1564ddd"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga6b8be690351c9484ab4558cad1564ddd">◆ </a></span>INS_ChangeReg()</h2>
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<div class="memitem">
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<div class="memproto">
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<table class="memname">
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<tr>
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<td class="memname">BOOL LEVEL_CORE::INS_ChangeReg </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">const REG </td>
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<td class="paramname"><em>old_reg</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">const REG </td>
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<td class="paramname"><em>new_reg</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">const BOOL </td>
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<td class="paramname"><em>as_read</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Change all occurrences of old_reg to new_reg in the r/w sets of the ins. Return TRUE if at least one occurrence changed. </p>
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</div>
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</div>
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<a id="ga828256a116051c3165edf3445da7d9ee"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga828256a116051c3165edf3445da7d9ee">◆ </a></span>INS_EffectiveAddressWidth()</h2>
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<tr>
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<td class="memname">UINT32 LEVEL_CORE::INS_EffectiveAddressWidth </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>the width of the effective address in bits </dd></dl>
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</div>
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</div>
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<a id="gac0601b32cd3d7c7c849df994729ce948"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gac0601b32cd3d7c7c849df994729ce948">◆ </a></span>INS_FullRegRContain()</h2>
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<div class="memitem">
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<table class="memname">
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<tr>
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<td class="memname">BOOL LEVEL_CORE::INS_FullRegRContain </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">const REG </td>
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<td class="paramname"><em>reg</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if ins uses reg as a read operand </dd></dl>
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</div>
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</div>
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<a id="gad53e348699db7a82ce5dc972a9fabe23"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gad53e348699db7a82ce5dc972a9fabe23">◆ </a></span>INS_FullRegWContain()</h2>
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<div class="memitem">
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<tr>
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<td class="memname">BOOL LEVEL_CORE::INS_FullRegWContain </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">const REG </td>
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<td class="paramname"><em>reg</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if ins uses reg as a write operand </dd></dl>
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</div>
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</div>
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<a id="ga82f8aa280ad2a806ba6bdb89a8953577"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga82f8aa280ad2a806ba6bdb89a8953577">◆ </a></span>INS_GetFarPointer()</h2>
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<td class="memname">VOID LEVEL_CORE::INS_GetFarPointer </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT16 & </td>
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<td class="paramname"><em>segment_selector</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 & </td>
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<td class="paramname"><em>displacement</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>the segment selector and displacement from a direct far jump. </dd></dl>
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<a id="ga286e936047a0257324b948dce216b8eb"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga286e936047a0257324b948dce216b8eb">◆ </a></span>INS_hasKnownMemorySize()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_hasKnownMemorySize </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>false if this instruction has a memory operand for which <a class="el" href="group__INST__ARGS.html#gga089c27ca15e9ff139dd3a3f8a6f8451dad2e2d24103d1a0286b57412f66b909d7">IARG_MEMORYREAD_SIZE</a> or <a class="el" href="group__INST__ARGS.html#gga089c27ca15e9ff139dd3a3f8a6f8451da365d8eed26ac239b013a01ab6a7cf375">IARG_MEMORYWRITE_SIZE</a> cannot be used (e.g. vectorized memory reference of the GATHER/SCATTER instructions). </dd></dl>
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</div>
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<a id="ga7fca105e9ec6a3014e5d0572533303a7"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga7fca105e9ec6a3014e5d0572533303a7">◆ </a></span>INS_HasMemoryVector()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_HasMemoryVector </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>TRUE iff the ins has a memory vector, i.e. the memory is accessed using a base address and an index vector with a scale. </dd></dl>
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<a id="ga73446270f46cfe66d3439d49277e346e"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga73446270f46cfe66d3439d49277e346e">◆ </a></span>INS_HasRealRep()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_HasRealRep </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>whether the instruction has a real REP/REPZ/REPNZ prefix (i.e. one which is not just part of the opcode encoding but does cause the instruction to repeat). </dd></dl>
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<a id="ga56bafd9886322b6c482c45558f17631e"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga56bafd9886322b6c482c45558f17631e">◆ </a></span>INS_IsDirectFarJump()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsDirectFarJump </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if the target address is a direct far jump </dd></dl>
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<a id="ga77bfb2f7fc130ce80fb8b1c9f7ecd83b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga77bfb2f7fc130ce80fb8b1c9f7ecd83b">◆ </a></span>INS_IsFarCall()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsFarCall </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if ins is a Far Call instruction </dd></dl>
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<a id="gae63d4680179c8b978faa8d1bccdcae24"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gae63d4680179c8b978faa8d1bccdcae24">◆ </a></span>INS_IsFarJump()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsFarJump </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if ins is a Far Jump instruction </dd></dl>
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<a id="ga8d46c0d7ba082a1e9cf73c82dbbb5682"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga8d46c0d7ba082a1e9cf73c82dbbb5682">◆ </a></span>INS_IsFarRet()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsFarRet </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if ins is a far ret instruction </dd></dl>
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<a id="gaf03d73a57bec3baec06a91713696910d"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaf03d73a57bec3baec06a91713696910d">◆ </a></span>INS_IsHalt()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsHalt </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if the ins is a halt or reserved undefined (UD2) instruction. </dd></dl>
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<a id="ga6cf7160e287f950809a55082ef73c3bd"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga6cf7160e287f950809a55082ef73c3bd">◆ </a></span>INS_IsInterrupt()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsInterrupt </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<p>Return TRUE if the INS is an interrupt category instruction </p>
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<a id="gab92dbfefabfeb3d4108e412b04383652"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gab92dbfefabfeb3d4108e412b04383652">◆ </a></span>INS_IsIRet()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsIRet </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<p>Returns true iff the given ins is an iret instruction. </p><dl class="section note"><dt>Note</dt><dd>See also <a class="el" href="group__INS__BASIC__API__GEN__IA32.html#gaf35ab682222bdbf641cba586e50c898a">INS_IsRet</a>. </dd></dl>
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction is an iret. </dd></dl>
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</div>
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<a id="ga98dbbb7087d422f3e9fccdc5598e94ef"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga98dbbb7087d422f3e9fccdc5598e94ef">◆ </a></span>INS_IsMaskMov()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsMaskMov </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if this instruction is a maskmovq or maskmovdqu. </dd></dl>
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</div>
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<a id="ga41886f09ab9dd83bc3285da382c819fa"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga41886f09ab9dd83bc3285da382c819fa">◆ </a></span>INS_IsMov()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsMov </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<p>returns true if this instruction is a move. </p>
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</div>
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<a id="ga0bdd0dcaa054f9e2a67c3278e1397418"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga0bdd0dcaa054f9e2a67c3278e1397418">◆ </a></span>INS_IsMovFullRegRegSame()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsMovFullRegRegSame </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<p>returns true if this instruction is a mov reg1, reg1. And reg1 is a full reg </p>
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<a id="gad4b326ad064332cb29444a14afbffacb"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gad4b326ad064332cb29444a14afbffacb">◆ </a></span>INS_IsPcMaterialization()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsPcMaterialization </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if this is a call to the next instruction, which is an idiom for materializing the instruction pointer </dd></dl>
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<a id="ga75c03a468b13754fc23bbd5aac78cc39"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga75c03a468b13754fc23bbd5aac78cc39">◆ </a></span>INS_IsRDTSC()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsRDTSC </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if this instruction is an rdtsc or rdtscp. </dd></dl>
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<a id="ga2b685b5e8b997ba224e975eeb701eba9"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga2b685b5e8b997ba224e975eeb701eba9">◆ </a></span>INS_IsStandardMemop()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsStandardMemop </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>false if this instruction has a memory operand which has unconventional meaning (e.g. vectorized memory reference of the GATHER/SCATTER instructions or some of the XSAVE instructions). </dd></dl>
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<a id="ga1949ef72fed614c95fc1088aa2e41677"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga1949ef72fed614c95fc1088aa2e41677">◆ </a></span>INS_IsStringop()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsStringop </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction is a string op (can be REP prefixed). </dd></dl>
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<a id="gac92624287c08122315352e5a061d70d7"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gac92624287c08122315352e5a061d70d7">◆ </a></span>INS_IsSub()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsSub </td>
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<td>(</td>
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<td class="paramtype">const INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<p>returns true if this instruction is a subtract. </p>
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<a id="ga6066befa9365475b2a1b967a0a7118be"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga6066befa9365475b2a1b967a0a7118be">◆ </a></span>INS_IsSysenter()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsSysenter </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction is a SysEnter </dd></dl>
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<a id="gade39ed3152b53757555c8d44037fd9c0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gade39ed3152b53757555c8d44037fd9c0">◆ </a></span>INS_IsVgather()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsVgather </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>TRUE iff the ins is a VGATHER* instruction </dd></dl>
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<a id="ga44961b904fc7b63d530c9f2a2cd49254"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga44961b904fc7b63d530c9f2a2cd49254">◆ </a></span>INS_IsVscatter()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsVscatter </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>TRUE iff the ins is a VSCATTER* instruction </dd></dl>
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<a id="gabcc0207eb241a0abd94249fcee88988d"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gabcc0207eb241a0abd94249fcee88988d">◆ </a></span>INS_IsXbegin()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsXbegin </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction is a Xbegin </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga757877869fb48ffb99b18630d6a4c1cc">◆ </a></span>INS_IsXchg()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsXchg </td>
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<td>(</td>
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction is an "xchg" </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga6faaec1f35334a9b0ad2d4044718591b">◆ </a></span>INS_IsXend()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_IsXend </td>
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<td>(</td>
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction is a Xend </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#gae2acdb42debd825cb55d0ed20b659a17">◆ </a></span>INS_LockPrefix()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_LockPrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has a lock prefix. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga187b385a60d62c5f42b0744eef498549">◆ </a></span>INS_MemoryBaseReg()</h2>
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<td class="memname">REG LEVEL_CORE::INS_MemoryBaseReg </td>
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<td>(</td>
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<dl class="section return"><dt>Returns</dt><dd>The base register used in the instruction's memory operand, or <a class="el" href="group__REG__CPU__GENERIC.html#gaaaa0c78b248ba24359988a2b713760b4">REG_INVALID()</a> if there is no base register. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga5f0ef7c1538ed615dc665e32dd269ae4">◆ </a></span>INS_MemoryDisplacement()</h2>
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<td class="memname">ADDRDELTA LEVEL_CORE::INS_MemoryDisplacement </td>
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<td>(</td>
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<dl class="section return"><dt>Returns</dt><dd>The memory displacement of an instrucation with memory operand. </dd></dl>
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<dl class="section note"><dt>Note</dt><dd>: the displacement is a signed number. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga63b94dcdda308885fd08d11321c90056">◆ </a></span>INS_MemoryIndexReg()</h2>
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<td class="memname">REG LEVEL_CORE::INS_MemoryIndexReg </td>
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<td>(</td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>The index register used in the instruction's memory operand, or <a class="el" href="group__REG__CPU__GENERIC.html#gaaaa0c78b248ba24359988a2b713760b4">REG_INVALID()</a> if there is no index register. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga1ad98add40186fb49b15fc05fdedb365">◆ </a></span>INS_MemoryOperandIndexToOperandIndex()</h2>
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<td class="memname">UINT32 LEVEL_CORE::INS_MemoryOperandIndexToOperandIndex </td>
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<td>(</td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>memopIdx</em> </td>
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<td>)</td>
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<p>Convert a memory operand index into a simple operand index.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir">[in]</td><td class="paramname">ins</td><td>The instruction. </td></tr>
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<tr><td class="paramdir">[in]</td><td class="paramname">memopIdx</td><td>Memory operand's index in the range [0, n-1], where n is from <a class="el" href="group__INS__BASIC__API__GEN__IA32.html#ga138b553c79c6e39fe5f3858a7a60c854">INS_MemoryOperandCount()</a>.</td></tr>
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</dd>
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<dl class="section return"><dt>Returns</dt><dd>operand index </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga46b6f625d021faccc7a04b3359acb787">◆ </a></span>INS_MemoryScale()</h2>
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<td class="memname">UINT32 LEVEL_CORE::INS_MemoryScale </td>
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<dl class="section return"><dt>Returns</dt><dd>The scale factor (1,2,4,8) by which the index register in the instruction's memory operand is multiplied. </dd></dl>
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<a id="gaf5943ec0aff99ac7a8eb50372a4f37c6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaf5943ec0aff99ac7a8eb50372a4f37c6">◆ </a></span>INS_OperandCount()</h2>
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<td class="memname">UINT32 LEVEL_CORE::INS_OperandCount </td>
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<p>Tells the number of operands for the instruction. Several other APIs take an operand index as a parameter. Those APIs expect an index in the range [0, n-1], where n is the value returned by <a class="el" href="group__INS__BASIC__API__IA32.html#gaf5943ec0aff99ac7a8eb50372a4f37c6">INS_OperandCount()</a>.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir">[in]</td><td class="paramname">ins</td><td>The instruction.</td></tr>
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<dl class="section return"><dt>Returns</dt><dd>The number of operands for the instruction. </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga79708c8843083389c1572bdb2f4d2f57">◆ </a></span>INS_OperandImmediate()</h2>
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<td class="memname">UINT64 LEVEL_CORE::INS_OperandImmediate </td>
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<td>(</td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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<td>)</td>
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<p>Although return type is UINT64, on 32-bit systems only the lower 32 bits are utilized. To see how to retrieve immediate values with correct width and sign information, see example in test tool PinTools/SimpleExamples/oper-imm.cpp. </p><dl class="section return"><dt>Returns</dt><dd>immediate value for operand </dd></dl>
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<a id="gae0b51cf908a5c032a1fbb01c4be319f4"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gae0b51cf908a5c032a1fbb01c4be319f4">◆ </a></span>INS_OperandIsBranchDisplacement()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandIsBranchDisplacement </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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<td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if this operand is a displacement (e.g. branch offset) </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#ga05b97b98fde0546de52b748660d1ef46">◆ </a></span>INS_OperandIsFixedMemop()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandIsFixedMemop </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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<td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>TRUE if memory operand uses predefined base register and this register can not be changed Example: movs ds:(esi), es:(edi) There are two fixed operands </dd></dl>
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<a id="ga27b51bab8782f669d2972faa3ea66ed6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga27b51bab8782f669d2972faa3ea66ed6">◆ </a></span>INS_OperandIsImmediate()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandIsImmediate </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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<td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if this operand is an immediate </dd></dl>
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<a id="gae0128a829ec3f93086b1f156fe88e90c"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gae0128a829ec3f93086b1f156fe88e90c">◆ </a></span>INS_OperandIsImplicit()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandIsImplicit </td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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<td></td>
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<td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if this operand is implied by the opcode (e.g. the stack write in a push instruction) </dd></dl>
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<h2 class="memtitle"><span class="permalink"><a href="#gae3250a73461f2f78b3ce333ca3d1a7da">◆ </a></span>INS_OperandIsMemory()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandIsMemory </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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<dl class="section return"><dt>Returns</dt><dd>true if this operand is a memory reference</dd></dl>
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<p>Note: this does not include LEA operands. </p>
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<h2 class="memtitle"><span class="permalink"><a href="#ga47e1a53b42fde8d1206482e17d7545ed">◆ </a></span>INS_OperandIsReg()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandIsReg </td>
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<td>(</td>
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<td class="paramkey"></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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<td></td>
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<td>)</td>
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<dl class="section return"><dt>Returns</dt><dd>true if this operand is a register </dd></dl>
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<a id="ga3a66cc7d453dfbc9b832e16cd1db21c1"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga3a66cc7d453dfbc9b832e16cd1db21c1">◆ </a></span>INS_OperandIsSegmentReg()</h2>
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<td>(</td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if this operand is a segment register </dd></dl>
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</div>
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<a id="ga7a47b680da19110e853ca057f384d5d9"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga7a47b680da19110e853ca057f384d5d9">◆ </a></span>INS_OperandMemoryBaseReg()</h2>
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<td class="memname">REG LEVEL_CORE::INS_OperandMemoryBaseReg </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>register used as base register in memory operand, or <a class="el" href="group__REG__CPU__GENERIC.html#gaaaa0c78b248ba24359988a2b713760b4">REG_INVALID()</a> Effective address = Displacement + BaseReg + IndexReg * Scale </dd></dl>
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<a id="ga513e73d8eb1112053fc09912c44a90a0"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga513e73d8eb1112053fc09912c44a90a0">◆ </a></span>INS_OperandMemoryDisplacement()</h2>
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<td class="memname">ADDRDELTA LEVEL_CORE::INS_OperandMemoryDisplacement </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>The memory displacement of an instrucation with memory operand. </dd></dl>
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<dl class="section note"><dt>Note</dt><dd>the displacement is a signed number. Effective address = Displacement + BaseReg + IndexReg * Scale </dd></dl>
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<a id="gaa48124a54af38b96b06f195b64c88da7"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaa48124a54af38b96b06f195b64c88da7">◆ </a></span>INS_OperandMemoryIndexReg()</h2>
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<div class="memitem">
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<td class="memname">REG LEVEL_CORE::INS_OperandMemoryIndexReg </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>register used as index register in memory operand, or <a class="el" href="group__REG__CPU__GENERIC.html#gaaaa0c78b248ba24359988a2b713760b4">REG_INVALID()</a> Effective address = Displacement + BaseReg + IndexReg * Scale </dd></dl>
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</div>
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</div>
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<a id="ga261f86ca702ffee5be4fbe882598bfa6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga261f86ca702ffee5be4fbe882598bfa6">◆ </a></span>INS_OperandMemoryScale()</h2>
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<td class="memname">UINT32 LEVEL_CORE::INS_OperandMemoryScale </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>scale used for addressing in memory operand. Effective address = Displacement + BaseReg + IndexReg * Scale </dd></dl>
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</div>
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<a id="ga1e34616a317e5f4421ddb058e9fc06c8"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga1e34616a317e5f4421ddb058e9fc06c8">◆ </a></span>INS_OperandMemorySegmentReg()</h2>
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<div class="memitem">
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<td class="memname">REG LEVEL_CORE::INS_OperandMemorySegmentReg </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>register used as segment register in memory operand, or <a class="el" href="group__REG__CPU__GENERIC.html#gaaaa0c78b248ba24359988a2b713760b4">REG_INVALID()</a> </dd></dl>
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<a id="ga4823eacf073639e40111fc11c9031a69"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga4823eacf073639e40111fc11c9031a69">◆ </a></span>INS_OperandRead()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandRead </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Tells if an instruction operand is a source; it may also be a destination.</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir">[in]</td><td class="paramname">ins</td><td>The instruction. </td></tr>
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<tr><td class="paramdir">[in]</td><td class="paramname">n</td><td>Operand's index in the range [0, n-1], where n is from <a class="el" href="group__INS__BASIC__API__IA32.html#gaf5943ec0aff99ac7a8eb50372a4f37c6">INS_OperandCount()</a>.</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>TRUE if the operand is a source. </dd></dl>
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</div>
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</div>
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<a id="ga86dc893a3b505e66181bfb1566b1ffb7"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga86dc893a3b505e66181bfb1566b1ffb7">◆ </a></span>INS_OperandReadAndWritten()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandReadAndWritten </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Tells if an instruction operand is both a source and a destination.</p>
|
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramdir">[in]</td><td class="paramname">ins</td><td>The instruction. </td></tr>
|
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<tr><td class="paramdir">[in]</td><td class="paramname">n</td><td>Operand's index in the range [0, n-1], where n is from <a class="el" href="group__INS__BASIC__API__IA32.html#gaf5943ec0aff99ac7a8eb50372a4f37c6">INS_OperandCount()</a>.</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>TRUE if the operand is both a source and a destination. </dd></dl>
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</div>
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</div>
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<a id="ga5350f8a716ad5631f25e44b0396b7d01"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga5350f8a716ad5631f25e44b0396b7d01">◆ </a></span>INS_OperandReadOnly()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandReadOnly </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Tells if an instruction operand is just a source (and not a destination).</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
|
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<tr><td class="paramdir">[in]</td><td class="paramname">ins</td><td>The instruction. </td></tr>
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<tr><td class="paramdir">[in]</td><td class="paramname">n</td><td>Operand's index in the range [0, n-1], where n is from <a class="el" href="group__INS__BASIC__API__IA32.html#gaf5943ec0aff99ac7a8eb50372a4f37c6">INS_OperandCount()</a>.</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>TRUE if the operand is just a source. </dd></dl>
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</div>
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</div>
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<a id="ga8392f6469bf5e04b59b390fa5b433918"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga8392f6469bf5e04b59b390fa5b433918">◆ </a></span>INS_OperandReg()</h2>
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<td class="memname">REG LEVEL_CORE::INS_OperandReg </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>register name for this operand, may return <a class="el" href="group__REG__CPU__GENERIC.html#gaaaa0c78b248ba24359988a2b713760b4">REG_INVALID()</a> </dd></dl>
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<a id="ga56bc844ef8d18730314ec1d26222b77d"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga56bc844ef8d18730314ec1d26222b77d">◆ </a></span>INS_OperandSizePrefix()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandSizePrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has an operand size prefix. </dd></dl>
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</div>
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<a id="ga800e25c6e0d5e8d07d28c3699e06dca6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga800e25c6e0d5e8d07d28c3699e06dca6">◆ </a></span>INS_OperandWidth()</h2>
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<td class="memname">UINT32 LEVEL_CORE::INS_OperandWidth </td>
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<td>(</td>
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<td class="paramtype">INS </td>
|
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>operand width in bits. </dd></dl>
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</div>
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</div>
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<a id="gaee8b4563d235f03f157af299c399bedf"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaee8b4563d235f03f157af299c399bedf">◆ </a></span>INS_OperandWritten()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandWritten </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
|
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
|
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
|
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Tells if an instruction operand is a destination; it may also be a source.</p>
|
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<dl class="params"><dt>Parameters</dt><dd>
|
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<table class="params">
|
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<tr><td class="paramdir">[in]</td><td class="paramname">ins</td><td>The instruction. </td></tr>
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<tr><td class="paramdir">[in]</td><td class="paramname">n</td><td>Operand's index in the range [0, n-1], where n is from <a class="el" href="group__INS__BASIC__API__IA32.html#gaf5943ec0aff99ac7a8eb50372a4f37c6">INS_OperandCount()</a>.</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>TRUE if the operand is a destination. </dd></dl>
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</div>
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<a id="gaa674e8402286e4ac35a911875e748814"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaa674e8402286e4ac35a911875e748814">◆ </a></span>INS_OperandWrittenOnly()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_OperandWrittenOnly </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">UINT32 </td>
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<td class="paramname"><em>n</em> </td>
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</tr>
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<tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<p>Tells if an instruction operand is just a destination (and not a source).</p>
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<dl class="params"><dt>Parameters</dt><dd>
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<table class="params">
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<tr><td class="paramdir">[in]</td><td class="paramname">ins</td><td>The instruction. </td></tr>
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<tr><td class="paramdir">[in]</td><td class="paramname">n</td><td>Operand's index in the range [0, n-1], where n is from <a class="el" href="group__INS__BASIC__API__IA32.html#gaf5943ec0aff99ac7a8eb50372a4f37c6">INS_OperandCount()</a>.</td></tr>
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</table>
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</dd>
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</dl>
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<dl class="section return"><dt>Returns</dt><dd>TRUE if the operand is just a destination. </dd></dl>
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</div>
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</div>
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<a id="gab06012050e687c4545d28b0d0cecd41b"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gab06012050e687c4545d28b0d0cecd41b">◆ </a></span>INS_RegIsImplicit()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_RegIsImplicit </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em>, </td>
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</tr>
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<td class="paramkey"></td>
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<td></td>
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<td class="paramtype">REG </td>
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<td class="paramname"><em>reg</em> </td>
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</tr>
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<td></td>
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<td>)</td>
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<td></td><td></td>
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</div><div class="memdoc">
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<p>Assumes that reg is a PIN register </p><dl class="section return"><dt>Returns</dt><dd>true if the ins has </dd></dl>
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<a id="ga8c243487db5a05e7410602ddd7087776"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga8c243487db5a05e7410602ddd7087776">◆ </a></span>INS_RepCountRegister()</h2>
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<td class="memname">REG LEVEL_CORE::INS_RepCountRegister </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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<dl class="section return"><dt>Returns</dt><dd>register used as the repeat counter by this REP prefixed instruction, or <a class="el" href="group__REG__CPU__GENERIC.html#gaaaa0c78b248ba24359988a2b713760b4">REG_INVALID()</a> if the instruction does not have a real REP prefix. </dd></dl>
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</div>
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</div>
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<a id="gad540956e542c9ab83a2675f68524d442"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gad540956e542c9ab83a2675f68524d442">◆ </a></span>INS_RepnePrefix()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_RepnePrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has an REPNE (0xF2) prefix. </dd></dl>
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</div>
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</div>
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<a id="ga375b7054588735c5c435a79cc2f036dc"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga375b7054588735c5c435a79cc2f036dc">◆ </a></span>INS_RepPrefix()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_RepPrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has an REP (0xF3) prefix. </dd></dl>
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</div>
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</div>
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<a id="ga766eb1444c60df4f1fa8690ac21461c7"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga766eb1444c60df4f1fa8690ac21461c7">◆ </a></span>INS_SegmentPrefix()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_SegmentPrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if the instruction has a segment prefix; Call <a class="el" href="group__INS__BASIC__API__IA32.html#ga55dd036dd7f0c36afc85ac5125385e43">INS_SegmentRegPrefix()</a> to get the actual prefix register name. </dd></dl>
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</div>
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</div>
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<a id="ga55dd036dd7f0c36afc85ac5125385e43"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga55dd036dd7f0c36afc85ac5125385e43">◆ </a></span>INS_SegmentRegPrefix()</h2>
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<td class="memname">REG LEVEL_CORE::INS_SegmentRegPrefix </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>Segment overide prefix used by INS </dd></dl>
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</div>
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</div>
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<a id="ga49d7509b93ae841c3db0025c3ad30484"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga49d7509b93ae841c3db0025c3ad30484">◆ </a></span>INS_SegPrefixIsMemoryRead()</h2>
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<td class="memname">BOOL LEVEL_CORE::INS_SegPrefixIsMemoryRead </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if this Seg prefixed instruction reads memory </dd></dl>
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</div>
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</div>
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<a id="ga16a0013b27d7a19bdb77c956864993c6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga16a0013b27d7a19bdb77c956864993c6">◆ </a></span>INS_SegPrefixIsMemoryWrite()</h2>
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<div class="memitem">
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<td class="memname">BOOL LEVEL_CORE::INS_SegPrefixIsMemoryWrite </td>
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<td>(</td>
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<td class="paramtype">INS </td>
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<td class="paramname"><em>ins</em></td><td>)</td>
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<td></td>
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</tr>
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</table>
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</div><div class="memdoc">
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<dl class="section return"><dt>Returns</dt><dd>true if this Seg prefixed instruction writes to memory </dd></dl>
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</div>
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</div>
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<a id="ga19720fbed396bde822170f82c212d32c"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#ga19720fbed396bde822170f82c212d32c">◆ </a></span>PIN_SetSyntaxATT()</h2>
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<td class="memname">VOID LEVEL_CORE::PIN_SetSyntaxATT </td>
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<td>(</td>
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<td class="paramname"></td><td>)</td>
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<td></td>
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</div><div class="memdoc">
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<p>Sets the disassembly syntax to ATT SYSV format. (Destination on the right) </p>
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</div>
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</div>
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<a id="gaef274dae710e4ff007b48e0b89bd70c1"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gaef274dae710e4ff007b48e0b89bd70c1">◆ </a></span>PIN_SetSyntaxIntel()</h2>
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<td class="memname">VOID LEVEL_CORE::PIN_SetSyntaxIntel </td>
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<td>(</td>
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<td class="paramname"></td><td>)</td>
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<td></td>
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</div><div class="memdoc">
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<p>Sets the disassembly syntax to Intel format. (Destination on the left) </p>
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</div>
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</div>
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<a id="gae72d6505d5d9310b73cc6aa905252bd6"></a>
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<h2 class="memtitle"><span class="permalink"><a href="#gae72d6505d5d9310b73cc6aa905252bd6">◆ </a></span>PIN_SetSyntaxXED()</h2>
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<td class="memname">VOID LEVEL_CORE::PIN_SetSyntaxXED </td>
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<td>(</td>
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<td class="paramname"></td><td>)</td>
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<td></td>
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</div><div class="memdoc">
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<p>Sets the disassembly syntax to Intel(R) X86 Encoder Decoder detailed format which lists all resources read and written. </p>
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</div>
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</div>
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