: /** * @brief The application entry point. * @retval int */ int main(void) { 8000724: b580 push {r7, lr} 8000726: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8000728: f000 fcb5 bl 8001096 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 800072c: f000 f838 bl 80007a0 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8000730: f000 f9be bl 8000ab0 MX_LPUART1_UART_Init(); 8000734: f000 f884 bl 8000840 MX_USART1_UART_Init(); 8000738: f000 f8ae bl 8000898 MX_TIM1_Init(); 800073c: f000 f90c bl 8000958 MX_USART2_UART_Init(); 8000740: f000 f8da bl 80008f8 /* USER CODE BEGIN 2 */ HAL_UARTEx_ReceiveToIdle_IT(&huart1, Rarr, 50); 8000744: 2232 movs r2, #50 ; 0x32 8000746: 4911 ldr r1, [pc, #68] ; (800078c ) 8000748: 4811 ldr r0, [pc, #68] ; (8000790 ) 800074a: f004 fe71 bl 8005430 HAL_UARTEx_ReceiveToIdle_IT(&hlpuart1, Rarr, 50); 800074e: 2232 movs r2, #50 ; 0x32 8000750: 490e ldr r1, [pc, #56] ; (800078c ) 8000752: 4810 ldr r0, [pc, #64] ; (8000794 ) 8000754: f004 fe6c bl 8005430 LoRa_T_V_Attach(1,1); 8000758: 2101 movs r1, #1 800075a: 2001 movs r0, #1 800075c: f7ff fed6 bl 800050c /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ pwmval=2000; 8000760: 4b0d ldr r3, [pc, #52] ; (8000798 ) 8000762: f44f 62fa mov.w r2, #2000 ; 0x7d0 8000766: 801a strh r2, [r3, #0] HAL_TIM_PWM_Start(&htim1,TIM_CHANNEL_1); 8000768: 2100 movs r1, #0 800076a: 480c ldr r0, [pc, #48] ; (800079c ) 800076c: f002 faac bl 8002cc8 while (1) { __HAL_TIM_SetCompare(&htim1,TIM_CHANNEL_1,pwmval); 8000770: 4b09 ldr r3, [pc, #36] ; (8000798 ) 8000772: 881a ldrh r2, [r3, #0] 8000774: 4b09 ldr r3, [pc, #36] ; (800079c ) 8000776: 681b ldr r3, [r3, #0] 8000778: 635a str r2, [r3, #52] ; 0x34 /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ //HAL_UART_Transmit(&hlpuart1, "HHHHH\r\n", strlen("HHHHH\r\n"),100); HAL_Delay(20000); 800077a: f644 6020 movw r0, #20000 ; 0x4e20 800077e: f000 fcff bl 8001180 pwmval=0; 8000782: 4b05 ldr r3, [pc, #20] ; (8000798 ) 8000784: 2200 movs r2, #0 8000786: 801a strh r2, [r3, #0] __HAL_TIM_SetCompare(&htim1,TIM_CHANNEL_1,pwmval); 8000788: e7f2 b.n 8000770 800078a: bf00 nop 800078c: 20000270 .word 0x20000270 8000790: 20000110 .word 0x20000110 8000794: 20000088 .word 0x20000088 8000798: 2000026c .word 0x2000026c 800079c: 20000220 .word 0x20000220 080007a0 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80007a0: b580 push {r7, lr} 80007a2: b096 sub sp, #88 ; 0x58 80007a4: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 80007a6: f107 0314 add.w r3, r7, #20 80007aa: 2244 movs r2, #68 ; 0x44 80007ac: 2100 movs r1, #0 80007ae: 4618 mov r0, r3 80007b0: f005 f884 bl 80058bc RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 80007b4: 463b mov r3, r7 80007b6: 2200 movs r2, #0 80007b8: 601a str r2, [r3, #0] 80007ba: 605a str r2, [r3, #4] 80007bc: 609a str r2, [r3, #8] 80007be: 60da str r2, [r3, #12] 80007c0: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) 80007c2: f44f 7000 mov.w r0, #512 ; 0x200 80007c6: f001 f82f bl 8001828 80007ca: 4603 mov r3, r0 80007cc: 2b00 cmp r3, #0 80007ce: d001 beq.n 80007d4 { Error_Handler(); 80007d0: f000 f9ce bl 8000b70 } /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 80007d4: 2301 movs r3, #1 80007d6: 617b str r3, [r7, #20] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80007d8: f44f 3380 mov.w r3, #65536 ; 0x10000 80007dc: 61bb str r3, [r7, #24] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80007de: 2302 movs r3, #2 80007e0: 63fb str r3, [r7, #60] ; 0x3c RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 80007e2: 2303 movs r3, #3 80007e4: 643b str r3, [r7, #64] ; 0x40 RCC_OscInitStruct.PLL.PLLM = 2; 80007e6: 2302 movs r3, #2 80007e8: 647b str r3, [r7, #68] ; 0x44 RCC_OscInitStruct.PLL.PLLN = 40; 80007ea: 2328 movs r3, #40 ; 0x28 80007ec: 64bb str r3, [r7, #72] ; 0x48 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; 80007ee: 2307 movs r3, #7 80007f0: 64fb str r3, [r7, #76] ; 0x4c RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2; 80007f2: 2302 movs r3, #2 80007f4: 653b str r3, [r7, #80] ; 0x50 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; 80007f6: 2302 movs r3, #2 80007f8: 657b str r3, [r7, #84] ; 0x54 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80007fa: f107 0314 add.w r3, r7, #20 80007fe: 4618 mov r0, r3 8000800: f001 f868 bl 80018d4 8000804: 4603 mov r3, r0 8000806: 2b00 cmp r3, #0 8000808: d001 beq.n 800080e { Error_Handler(); 800080a: f000 f9b1 bl 8000b70 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 800080e: 230f movs r3, #15 8000810: 603b str r3, [r7, #0] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8000812: 2303 movs r3, #3 8000814: 607b str r3, [r7, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 8000816: 2300 movs r3, #0 8000818: 60bb str r3, [r7, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 800081a: f44f 63a0 mov.w r3, #1280 ; 0x500 800081e: 60fb str r3, [r7, #12] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8000820: 2300 movs r3, #0 8000822: 613b str r3, [r7, #16] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) 8000824: 463b mov r3, r7 8000826: 2104 movs r1, #4 8000828: 4618 mov r0, r3 800082a: f001 fc67 bl 80020fc 800082e: 4603 mov r3, r0 8000830: 2b00 cmp r3, #0 8000832: d001 beq.n 8000838 { Error_Handler(); 8000834: f000 f99c bl 8000b70 } } 8000838: bf00 nop 800083a: 3758 adds r7, #88 ; 0x58 800083c: 46bd mov sp, r7 800083e: bd80 pop {r7, pc} 08000840 : * @brief LPUART1 Initialization Function * @param None * @retval None */ static void MX_LPUART1_UART_Init(void) { 8000840: b580 push {r7, lr} 8000842: af00 add r7, sp, #0 /* USER CODE END LPUART1_Init 0 */ /* USER CODE BEGIN LPUART1_Init 1 */ /* USER CODE END LPUART1_Init 1 */ hlpuart1.Instance = LPUART1; 8000844: 4b12 ldr r3, [pc, #72] ; (8000890 ) 8000846: 4a13 ldr r2, [pc, #76] ; (8000894 ) 8000848: 601a str r2, [r3, #0] hlpuart1.Init.BaudRate = 115200; 800084a: 4b11 ldr r3, [pc, #68] ; (8000890 ) 800084c: f44f 32e1 mov.w r2, #115200 ; 0x1c200 8000850: 605a str r2, [r3, #4] hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; 8000852: 4b0f ldr r3, [pc, #60] ; (8000890 ) 8000854: 2200 movs r2, #0 8000856: 609a str r2, [r3, #8] hlpuart1.Init.StopBits = UART_STOPBITS_1; 8000858: 4b0d ldr r3, [pc, #52] ; (8000890 ) 800085a: 2200 movs r2, #0 800085c: 60da str r2, [r3, #12] hlpuart1.Init.Parity = UART_PARITY_NONE; 800085e: 4b0c ldr r3, [pc, #48] ; (8000890 ) 8000860: 2200 movs r2, #0 8000862: 611a str r2, [r3, #16] hlpuart1.Init.Mode = UART_MODE_TX_RX; 8000864: 4b0a ldr r3, [pc, #40] ; (8000890 ) 8000866: 220c movs r2, #12 8000868: 615a str r2, [r3, #20] hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800086a: 4b09 ldr r3, [pc, #36] ; (8000890 ) 800086c: 2200 movs r2, #0 800086e: 619a str r2, [r3, #24] hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 8000870: 4b07 ldr r3, [pc, #28] ; (8000890 ) 8000872: 2200 movs r2, #0 8000874: 621a str r2, [r3, #32] hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 8000876: 4b06 ldr r3, [pc, #24] ; (8000890 ) 8000878: 2200 movs r2, #0 800087a: 625a str r2, [r3, #36] ; 0x24 if (HAL_UART_Init(&hlpuart1) != HAL_OK) 800087c: 4804 ldr r0, [pc, #16] ; (8000890 ) 800087e: f003 f95f bl 8003b40 8000882: 4603 mov r3, r0 8000884: 2b00 cmp r3, #0 8000886: d001 beq.n 800088c { Error_Handler(); 8000888: f000 f972 bl 8000b70 } /* USER CODE BEGIN LPUART1_Init 2 */ /* USER CODE END LPUART1_Init 2 */ } 800088c: bf00 nop 800088e: bd80 pop {r7, pc} 8000890: 20000088 .word 0x20000088 8000894: 40008000 .word 0x40008000 08000898 : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 8000898: b580 push {r7, lr} 800089a: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800089c: 4b14 ldr r3, [pc, #80] ; (80008f0 ) 800089e: 4a15 ldr r2, [pc, #84] ; (80008f4 ) 80008a0: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 80008a2: 4b13 ldr r3, [pc, #76] ; (80008f0 ) 80008a4: f44f 32e1 mov.w r2, #115200 ; 0x1c200 80008a8: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 80008aa: 4b11 ldr r3, [pc, #68] ; (80008f0 ) 80008ac: 2200 movs r2, #0 80008ae: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 80008b0: 4b0f ldr r3, [pc, #60] ; (80008f0 ) 80008b2: 2200 movs r2, #0 80008b4: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 80008b6: 4b0e ldr r3, [pc, #56] ; (80008f0 ) 80008b8: 2200 movs r2, #0 80008ba: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80008bc: 4b0c ldr r3, [pc, #48] ; (80008f0 ) 80008be: 220c movs r2, #12 80008c0: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80008c2: 4b0b ldr r3, [pc, #44] ; (80008f0 ) 80008c4: 2200 movs r2, #0 80008c6: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80008c8: 4b09 ldr r3, [pc, #36] ; (80008f0 ) 80008ca: 2200 movs r2, #0 80008cc: 61da str r2, [r3, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 80008ce: 4b08 ldr r3, [pc, #32] ; (80008f0 ) 80008d0: 2200 movs r2, #0 80008d2: 621a str r2, [r3, #32] huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 80008d4: 4b06 ldr r3, [pc, #24] ; (80008f0 ) 80008d6: 2200 movs r2, #0 80008d8: 625a str r2, [r3, #36] ; 0x24 if (HAL_UART_Init(&huart1) != HAL_OK) 80008da: 4805 ldr r0, [pc, #20] ; (80008f0 ) 80008dc: f003 f930 bl 8003b40 80008e0: 4603 mov r3, r0 80008e2: 2b00 cmp r3, #0 80008e4: d001 beq.n 80008ea { Error_Handler(); 80008e6: f000 f943 bl 8000b70 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 80008ea: bf00 nop 80008ec: bd80 pop {r7, pc} 80008ee: bf00 nop 80008f0: 20000110 .word 0x20000110 80008f4: 40013800 .word 0x40013800 080008f8 : * @brief USART2 Initialization Function * @param None * @retval None */ static void MX_USART2_UART_Init(void) { 80008f8: b580 push {r7, lr} 80008fa: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 80008fc: 4b14 ldr r3, [pc, #80] ; (8000950 ) 80008fe: 4a15 ldr r2, [pc, #84] ; (8000954 ) 8000900: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 8000902: 4b13 ldr r3, [pc, #76] ; (8000950 ) 8000904: f44f 32e1 mov.w r2, #115200 ; 0x1c200 8000908: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 800090a: 4b11 ldr r3, [pc, #68] ; (8000950 ) 800090c: 2200 movs r2, #0 800090e: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8000910: 4b0f ldr r3, [pc, #60] ; (8000950 ) 8000912: 2200 movs r2, #0 8000914: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 8000916: 4b0e ldr r3, [pc, #56] ; (8000950 ) 8000918: 2200 movs r2, #0 800091a: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 800091c: 4b0c ldr r3, [pc, #48] ; (8000950 ) 800091e: 220c movs r2, #12 8000920: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8000922: 4b0b ldr r3, [pc, #44] ; (8000950 ) 8000924: 2200 movs r2, #0 8000926: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8000928: 4b09 ldr r3, [pc, #36] ; (8000950 ) 800092a: 2200 movs r2, #0 800092c: 61da str r2, [r3, #28] huart2.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 800092e: 4b08 ldr r3, [pc, #32] ; (8000950 ) 8000930: 2200 movs r2, #0 8000932: 621a str r2, [r3, #32] huart2.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 8000934: 4b06 ldr r3, [pc, #24] ; (8000950 ) 8000936: 2200 movs r2, #0 8000938: 625a str r2, [r3, #36] ; 0x24 if (HAL_UART_Init(&huart2) != HAL_OK) 800093a: 4805 ldr r0, [pc, #20] ; (8000950 ) 800093c: f003 f900 bl 8003b40 8000940: 4603 mov r3, r0 8000942: 2b00 cmp r3, #0 8000944: d001 beq.n 800094a { Error_Handler(); 8000946: f000 f913 bl 8000b70 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 800094a: bf00 nop 800094c: bd80 pop {r7, pc} 800094e: bf00 nop 8000950: 20000198 .word 0x20000198 8000954: 40004400 .word 0x40004400 08000958 : * @brief TIM1 Initialization Function * @param None * @retval None */ static void MX_TIM1_Init(void) { 8000958: b580 push {r7, lr} 800095a: b09a sub sp, #104 ; 0x68 800095c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM1_Init 0 */ /* USER CODE END TIM1_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; 800095e: f107 0358 add.w r3, r7, #88 ; 0x58 8000962: 2200 movs r2, #0 8000964: 601a str r2, [r3, #0] 8000966: 605a str r2, [r3, #4] 8000968: 609a str r2, [r3, #8] 800096a: 60da str r2, [r3, #12] TIM_MasterConfigTypeDef sMasterConfig = {0}; 800096c: f107 034c add.w r3, r7, #76 ; 0x4c 8000970: 2200 movs r2, #0 8000972: 601a str r2, [r3, #0] 8000974: 605a str r2, [r3, #4] 8000976: 609a str r2, [r3, #8] TIM_OC_InitTypeDef sConfigOC = {0}; 8000978: f107 0330 add.w r3, r7, #48 ; 0x30 800097c: 2200 movs r2, #0 800097e: 601a str r2, [r3, #0] 8000980: 605a str r2, [r3, #4] 8000982: 609a str r2, [r3, #8] 8000984: 60da str r2, [r3, #12] 8000986: 611a str r2, [r3, #16] 8000988: 615a str r2, [r3, #20] 800098a: 619a str r2, [r3, #24] TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0}; 800098c: 1d3b adds r3, r7, #4 800098e: 222c movs r2, #44 ; 0x2c 8000990: 2100 movs r1, #0 8000992: 4618 mov r0, r3 8000994: f004 ff92 bl 80058bc /* USER CODE BEGIN TIM1_Init 1 */ /* USER CODE END TIM1_Init 1 */ htim1.Instance = TIM1; 8000998: 4b43 ldr r3, [pc, #268] ; (8000aa8 ) 800099a: 4a44 ldr r2, [pc, #272] ; (8000aac ) 800099c: 601a str r2, [r3, #0] htim1.Init.Prescaler = 0; 800099e: 4b42 ldr r3, [pc, #264] ; (8000aa8 ) 80009a0: 2200 movs r2, #0 80009a2: 605a str r2, [r3, #4] htim1.Init.CounterMode = TIM_COUNTERMODE_UP; 80009a4: 4b40 ldr r3, [pc, #256] ; (8000aa8 ) 80009a6: 2200 movs r2, #0 80009a8: 609a str r2, [r3, #8] htim1.Init.Period = 65535; 80009aa: 4b3f ldr r3, [pc, #252] ; (8000aa8 ) 80009ac: f64f 72ff movw r2, #65535 ; 0xffff 80009b0: 60da str r2, [r3, #12] htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80009b2: 4b3d ldr r3, [pc, #244] ; (8000aa8 ) 80009b4: 2200 movs r2, #0 80009b6: 611a str r2, [r3, #16] htim1.Init.RepetitionCounter = 0; 80009b8: 4b3b ldr r3, [pc, #236] ; (8000aa8 ) 80009ba: 2200 movs r2, #0 80009bc: 615a str r2, [r3, #20] htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80009be: 4b3a ldr r3, [pc, #232] ; (8000aa8 ) 80009c0: 2200 movs r2, #0 80009c2: 619a str r2, [r3, #24] if (HAL_TIM_Base_Init(&htim1) != HAL_OK) 80009c4: 4838 ldr r0, [pc, #224] ; (8000aa8 ) 80009c6: f002 f8c7 bl 8002b58 80009ca: 4603 mov r3, r0 80009cc: 2b00 cmp r3, #0 80009ce: d001 beq.n 80009d4 { Error_Handler(); 80009d0: f000 f8ce bl 8000b70 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; 80009d4: f44f 5380 mov.w r3, #4096 ; 0x1000 80009d8: 65bb str r3, [r7, #88] ; 0x58 if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) 80009da: f107 0358 add.w r3, r7, #88 ; 0x58 80009de: 4619 mov r1, r3 80009e0: 4831 ldr r0, [pc, #196] ; (8000aa8 ) 80009e2: f002 fb63 bl 80030ac 80009e6: 4603 mov r3, r0 80009e8: 2b00 cmp r3, #0 80009ea: d001 beq.n 80009f0 { Error_Handler(); 80009ec: f000 f8c0 bl 8000b70 } if (HAL_TIM_PWM_Init(&htim1) != HAL_OK) 80009f0: 482d ldr r0, [pc, #180] ; (8000aa8 ) 80009f2: f002 f908 bl 8002c06 80009f6: 4603 mov r3, r0 80009f8: 2b00 cmp r3, #0 80009fa: d001 beq.n 8000a00 { Error_Handler(); 80009fc: f000 f8b8 bl 8000b70 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8000a00: 2300 movs r3, #0 8000a02: 64fb str r3, [r7, #76] ; 0x4c sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; 8000a04: 2300 movs r3, #0 8000a06: 653b str r3, [r7, #80] ; 0x50 sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 8000a08: 2300 movs r3, #0 8000a0a: 657b str r3, [r7, #84] ; 0x54 if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) 8000a0c: f107 034c add.w r3, r7, #76 ; 0x4c 8000a10: 4619 mov r1, r3 8000a12: 4825 ldr r0, [pc, #148] ; (8000aa8 ) 8000a14: f002 ffb6 bl 8003984 8000a18: 4603 mov r3, r0 8000a1a: 2b00 cmp r3, #0 8000a1c: d001 beq.n 8000a22 { Error_Handler(); 8000a1e: f000 f8a7 bl 8000b70 } sConfigOC.OCMode = TIM_OCMODE_PWM1; 8000a22: 2360 movs r3, #96 ; 0x60 8000a24: 633b str r3, [r7, #48] ; 0x30 sConfigOC.Pulse = 0; 8000a26: 2300 movs r3, #0 8000a28: 637b str r3, [r7, #52] ; 0x34 sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8000a2a: 2300 movs r3, #0 8000a2c: 63bb str r3, [r7, #56] ; 0x38 sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH; 8000a2e: 2300 movs r3, #0 8000a30: 63fb str r3, [r7, #60] ; 0x3c sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 8000a32: 2300 movs r3, #0 8000a34: 643b str r3, [r7, #64] ; 0x40 sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; 8000a36: 2300 movs r3, #0 8000a38: 647b str r3, [r7, #68] ; 0x44 sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; 8000a3a: 2300 movs r3, #0 8000a3c: 64bb str r3, [r7, #72] ; 0x48 if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8000a3e: f107 0330 add.w r3, r7, #48 ; 0x30 8000a42: 2200 movs r2, #0 8000a44: 4619 mov r1, r3 8000a46: 4818 ldr r0, [pc, #96] ; (8000aa8 ) 8000a48: f002 fa1c bl 8002e84 8000a4c: 4603 mov r3, r0 8000a4e: 2b00 cmp r3, #0 8000a50: d001 beq.n 8000a56 { Error_Handler(); 8000a52: f000 f88d bl 8000b70 } sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE; 8000a56: 2300 movs r3, #0 8000a58: 607b str r3, [r7, #4] sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE; 8000a5a: 2300 movs r3, #0 8000a5c: 60bb str r3, [r7, #8] sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF; 8000a5e: 2300 movs r3, #0 8000a60: 60fb str r3, [r7, #12] sBreakDeadTimeConfig.DeadTime = 0; 8000a62: 2300 movs r3, #0 8000a64: 613b str r3, [r7, #16] sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE; 8000a66: 2300 movs r3, #0 8000a68: 617b str r3, [r7, #20] sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH; 8000a6a: f44f 5300 mov.w r3, #8192 ; 0x2000 8000a6e: 61bb str r3, [r7, #24] sBreakDeadTimeConfig.BreakFilter = 0; 8000a70: 2300 movs r3, #0 8000a72: 61fb str r3, [r7, #28] sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE; 8000a74: 2300 movs r3, #0 8000a76: 623b str r3, [r7, #32] sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH; 8000a78: f04f 7300 mov.w r3, #33554432 ; 0x2000000 8000a7c: 627b str r3, [r7, #36] ; 0x24 sBreakDeadTimeConfig.Break2Filter = 0; 8000a7e: 2300 movs r3, #0 8000a80: 62bb str r3, [r7, #40] ; 0x28 sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE; 8000a82: 2300 movs r3, #0 8000a84: 62fb str r3, [r7, #44] ; 0x2c if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) 8000a86: 1d3b adds r3, r7, #4 8000a88: 4619 mov r1, r3 8000a8a: 4807 ldr r0, [pc, #28] ; (8000aa8 ) 8000a8c: f002 ffe0 bl 8003a50 8000a90: 4603 mov r3, r0 8000a92: 2b00 cmp r3, #0 8000a94: d001 beq.n 8000a9a { Error_Handler(); 8000a96: f000 f86b bl 8000b70 } /* USER CODE BEGIN TIM1_Init 2 */ /* USER CODE END TIM1_Init 2 */ HAL_TIM_MspPostInit(&htim1); 8000a9a: 4803 ldr r0, [pc, #12] ; (8000aa8 ) 8000a9c: f000 f9a6 bl 8000dec } 8000aa0: bf00 nop 8000aa2: 3768 adds r7, #104 ; 0x68 8000aa4: 46bd mov sp, r7 8000aa6: bd80 pop {r7, pc} 8000aa8: 20000220 .word 0x20000220 8000aac: 40012c00 .word 0x40012c00 08000ab0 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8000ab0: b580 push {r7, lr} 8000ab2: b088 sub sp, #32 8000ab4: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000ab6: f107 030c add.w r3, r7, #12 8000aba: 2200 movs r2, #0 8000abc: 601a str r2, [r3, #0] 8000abe: 605a str r2, [r3, #4] 8000ac0: 609a str r2, [r3, #8] 8000ac2: 60da str r2, [r3, #12] 8000ac4: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); 8000ac6: 4b28 ldr r3, [pc, #160] ; (8000b68 ) 8000ac8: 6cdb ldr r3, [r3, #76] ; 0x4c 8000aca: 4a27 ldr r2, [pc, #156] ; (8000b68 ) 8000acc: f043 0304 orr.w r3, r3, #4 8000ad0: 64d3 str r3, [r2, #76] ; 0x4c 8000ad2: 4b25 ldr r3, [pc, #148] ; (8000b68 ) 8000ad4: 6cdb ldr r3, [r3, #76] ; 0x4c 8000ad6: f003 0304 and.w r3, r3, #4 8000ada: 60bb str r3, [r7, #8] 8000adc: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOH_CLK_ENABLE(); 8000ade: 4b22 ldr r3, [pc, #136] ; (8000b68 ) 8000ae0: 6cdb ldr r3, [r3, #76] ; 0x4c 8000ae2: 4a21 ldr r2, [pc, #132] ; (8000b68 ) 8000ae4: f043 0380 orr.w r3, r3, #128 ; 0x80 8000ae8: 64d3 str r3, [r2, #76] ; 0x4c 8000aea: 4b1f ldr r3, [pc, #124] ; (8000b68 ) 8000aec: 6cdb ldr r3, [r3, #76] ; 0x4c 8000aee: f003 0380 and.w r3, r3, #128 ; 0x80 8000af2: 607b str r3, [r7, #4] 8000af4: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000af6: 4b1c ldr r3, [pc, #112] ; (8000b68 ) 8000af8: 6cdb ldr r3, [r3, #76] ; 0x4c 8000afa: 4a1b ldr r2, [pc, #108] ; (8000b68 ) 8000afc: f043 0301 orr.w r3, r3, #1 8000b00: 64d3 str r3, [r2, #76] ; 0x4c 8000b02: 4b19 ldr r3, [pc, #100] ; (8000b68 ) 8000b04: 6cdb ldr r3, [r3, #76] ; 0x4c 8000b06: f003 0301 and.w r3, r3, #1 8000b0a: 603b str r3, [r7, #0] 8000b0c: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_2, GPIO_PIN_RESET); 8000b0e: 2200 movs r2, #0 8000b10: 2104 movs r1, #4 8000b12: 4816 ldr r0, [pc, #88] ; (8000b6c ) 8000b14: f000 fe62 bl 80017dc /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0, GPIO_PIN_RESET); 8000b18: 2200 movs r2, #0 8000b1a: 2101 movs r1, #1 8000b1c: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 8000b20: f000 fe5c bl 80017dc /*Configure GPIO pin : PC2 */ GPIO_InitStruct.Pin = GPIO_PIN_2; 8000b24: 2304 movs r3, #4 8000b26: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8000b28: 2301 movs r3, #1 8000b2a: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000b2c: 2300 movs r3, #0 8000b2e: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000b30: 2300 movs r3, #0 8000b32: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000b34: f107 030c add.w r3, r7, #12 8000b38: 4619 mov r1, r3 8000b3a: 480c ldr r0, [pc, #48] ; (8000b6c ) 8000b3c: f000 fcd4 bl 80014e8 /*Configure GPIO pin : PA0 */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8000b40: 2301 movs r3, #1 8000b42: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8000b44: 2301 movs r3, #1 8000b46: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000b48: 2300 movs r3, #0 8000b4a: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000b4c: 2300 movs r3, #0 8000b4e: 61bb str r3, [r7, #24] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000b50: f107 030c add.w r3, r7, #12 8000b54: 4619 mov r1, r3 8000b56: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 8000b5a: f000 fcc5 bl 80014e8 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8000b5e: bf00 nop 8000b60: 3720 adds r7, #32 8000b62: 46bd mov sp, r7 8000b64: bd80 pop {r7, pc} 8000b66: bf00 nop 8000b68: 40021000 .word 0x40021000 8000b6c: 48000800 .word 0x48000800 08000b70 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8000b70: b480 push {r7} 8000b72: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8000b74: b672 cpsid i } 8000b76: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8000b78: e7fe b.n 8000b78 ... 08000b7c : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8000b7c: b480 push {r7} 8000b7e: b083 sub sp, #12 8000b80: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8000b82: 4b0f ldr r3, [pc, #60] ; (8000bc0 ) 8000b84: 6e1b ldr r3, [r3, #96] ; 0x60 8000b86: 4a0e ldr r2, [pc, #56] ; (8000bc0 ) 8000b88: f043 0301 orr.w r3, r3, #1 8000b8c: 6613 str r3, [r2, #96] ; 0x60 8000b8e: 4b0c ldr r3, [pc, #48] ; (8000bc0 ) 8000b90: 6e1b ldr r3, [r3, #96] ; 0x60 8000b92: f003 0301 and.w r3, r3, #1 8000b96: 607b str r3, [r7, #4] 8000b98: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 8000b9a: 4b09 ldr r3, [pc, #36] ; (8000bc0 ) 8000b9c: 6d9b ldr r3, [r3, #88] ; 0x58 8000b9e: 4a08 ldr r2, [pc, #32] ; (8000bc0 ) 8000ba0: f043 5380 orr.w r3, r3, #268435456 ; 0x10000000 8000ba4: 6593 str r3, [r2, #88] ; 0x58 8000ba6: 4b06 ldr r3, [pc, #24] ; (8000bc0 ) 8000ba8: 6d9b ldr r3, [r3, #88] ; 0x58 8000baa: f003 5380 and.w r3, r3, #268435456 ; 0x10000000 8000bae: 603b str r3, [r7, #0] 8000bb0: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8000bb2: bf00 nop 8000bb4: 370c adds r7, #12 8000bb6: 46bd mov sp, r7 8000bb8: f85d 7b04 ldr.w r7, [sp], #4 8000bbc: 4770 bx lr 8000bbe: bf00 nop 8000bc0: 40021000 .word 0x40021000 08000bc4 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8000bc4: b580 push {r7, lr} 8000bc6: b0a4 sub sp, #144 ; 0x90 8000bc8: af00 add r7, sp, #0 8000bca: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000bcc: f107 037c add.w r3, r7, #124 ; 0x7c 8000bd0: 2200 movs r2, #0 8000bd2: 601a str r2, [r3, #0] 8000bd4: 605a str r2, [r3, #4] 8000bd6: 609a str r2, [r3, #8] 8000bd8: 60da str r2, [r3, #12] 8000bda: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; 8000bdc: f107 0320 add.w r3, r7, #32 8000be0: 225c movs r2, #92 ; 0x5c 8000be2: 2100 movs r1, #0 8000be4: 4618 mov r0, r3 8000be6: f004 fe69 bl 80058bc if(huart->Instance==LPUART1) 8000bea: 687b ldr r3, [r7, #4] 8000bec: 681b ldr r3, [r3, #0] 8000bee: 4a6a ldr r2, [pc, #424] ; (8000d98 ) 8000bf0: 4293 cmp r3, r2 8000bf2: d142 bne.n 8000c7a /* USER CODE END LPUART1_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; 8000bf4: 2320 movs r3, #32 8000bf6: 623b str r3, [r7, #32] PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; 8000bf8: 2300 movs r3, #0 8000bfa: 64fb str r3, [r7, #76] ; 0x4c if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8000bfc: f107 0320 add.w r3, r7, #32 8000c00: 4618 mov r0, r3 8000c02: f001 fc9f bl 8002544 8000c06: 4603 mov r3, r0 8000c08: 2b00 cmp r3, #0 8000c0a: d001 beq.n 8000c10 { Error_Handler(); 8000c0c: f7ff ffb0 bl 8000b70 } /* Peripheral clock enable */ __HAL_RCC_LPUART1_CLK_ENABLE(); 8000c10: 4b62 ldr r3, [pc, #392] ; (8000d9c ) 8000c12: 6ddb ldr r3, [r3, #92] ; 0x5c 8000c14: 4a61 ldr r2, [pc, #388] ; (8000d9c ) 8000c16: f043 0301 orr.w r3, r3, #1 8000c1a: 65d3 str r3, [r2, #92] ; 0x5c 8000c1c: 4b5f ldr r3, [pc, #380] ; (8000d9c ) 8000c1e: 6ddb ldr r3, [r3, #92] ; 0x5c 8000c20: f003 0301 and.w r3, r3, #1 8000c24: 61fb str r3, [r7, #28] 8000c26: 69fb ldr r3, [r7, #28] __HAL_RCC_GPIOC_CLK_ENABLE(); 8000c28: 4b5c ldr r3, [pc, #368] ; (8000d9c ) 8000c2a: 6cdb ldr r3, [r3, #76] ; 0x4c 8000c2c: 4a5b ldr r2, [pc, #364] ; (8000d9c ) 8000c2e: f043 0304 orr.w r3, r3, #4 8000c32: 64d3 str r3, [r2, #76] ; 0x4c 8000c34: 4b59 ldr r3, [pc, #356] ; (8000d9c ) 8000c36: 6cdb ldr r3, [r3, #76] ; 0x4c 8000c38: f003 0304 and.w r3, r3, #4 8000c3c: 61bb str r3, [r7, #24] 8000c3e: 69bb ldr r3, [r7, #24] /**LPUART1 GPIO Configuration PC0 ------> LPUART1_RX PC1 ------> LPUART1_TX */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; 8000c40: 2303 movs r3, #3 8000c42: 67fb str r3, [r7, #124] ; 0x7c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000c44: 2302 movs r3, #2 8000c46: f8c7 3080 str.w r3, [r7, #128] ; 0x80 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000c4a: 2300 movs r3, #0 8000c4c: f8c7 3084 str.w r3, [r7, #132] ; 0x84 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000c50: 2303 movs r3, #3 8000c52: f8c7 3088 str.w r3, [r7, #136] ; 0x88 GPIO_InitStruct.Alternate = GPIO_AF8_LPUART1; 8000c56: 2308 movs r3, #8 8000c58: f8c7 308c str.w r3, [r7, #140] ; 0x8c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000c5c: f107 037c add.w r3, r7, #124 ; 0x7c 8000c60: 4619 mov r1, r3 8000c62: 484f ldr r0, [pc, #316] ; (8000da0 ) 8000c64: f000 fc40 bl 80014e8 /* LPUART1 interrupt Init */ HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0); 8000c68: 2200 movs r2, #0 8000c6a: 2100 movs r1, #0 8000c6c: 2046 movs r0, #70 ; 0x46 8000c6e: f000 fb86 bl 800137e HAL_NVIC_EnableIRQ(LPUART1_IRQn); 8000c72: 2046 movs r0, #70 ; 0x46 8000c74: f000 fb9f bl 80013b6 /* USER CODE BEGIN USART2_MspInit 1 */ /* USER CODE END USART2_MspInit 1 */ } } 8000c78: e089 b.n 8000d8e else if(huart->Instance==USART1) 8000c7a: 687b ldr r3, [r7, #4] 8000c7c: 681b ldr r3, [r3, #0] 8000c7e: 4a49 ldr r2, [pc, #292] ; (8000da4 ) 8000c80: 4293 cmp r3, r2 8000c82: d144 bne.n 8000d0e PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; 8000c84: 2301 movs r3, #1 8000c86: 623b str r3, [r7, #32] PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; 8000c88: 2300 movs r3, #0 8000c8a: 643b str r3, [r7, #64] ; 0x40 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8000c8c: f107 0320 add.w r3, r7, #32 8000c90: 4618 mov r0, r3 8000c92: f001 fc57 bl 8002544 8000c96: 4603 mov r3, r0 8000c98: 2b00 cmp r3, #0 8000c9a: d001 beq.n 8000ca0 Error_Handler(); 8000c9c: f7ff ff68 bl 8000b70 __HAL_RCC_USART1_CLK_ENABLE(); 8000ca0: 4b3e ldr r3, [pc, #248] ; (8000d9c ) 8000ca2: 6e1b ldr r3, [r3, #96] ; 0x60 8000ca4: 4a3d ldr r2, [pc, #244] ; (8000d9c ) 8000ca6: f443 4380 orr.w r3, r3, #16384 ; 0x4000 8000caa: 6613 str r3, [r2, #96] ; 0x60 8000cac: 4b3b ldr r3, [pc, #236] ; (8000d9c ) 8000cae: 6e1b ldr r3, [r3, #96] ; 0x60 8000cb0: f403 4380 and.w r3, r3, #16384 ; 0x4000 8000cb4: 617b str r3, [r7, #20] 8000cb6: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000cb8: 4b38 ldr r3, [pc, #224] ; (8000d9c ) 8000cba: 6cdb ldr r3, [r3, #76] ; 0x4c 8000cbc: 4a37 ldr r2, [pc, #220] ; (8000d9c ) 8000cbe: f043 0301 orr.w r3, r3, #1 8000cc2: 64d3 str r3, [r2, #76] ; 0x4c 8000cc4: 4b35 ldr r3, [pc, #212] ; (8000d9c ) 8000cc6: 6cdb ldr r3, [r3, #76] ; 0x4c 8000cc8: f003 0301 and.w r3, r3, #1 8000ccc: 613b str r3, [r7, #16] 8000cce: 693b ldr r3, [r7, #16] GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; 8000cd0: f44f 63c0 mov.w r3, #1536 ; 0x600 8000cd4: 67fb str r3, [r7, #124] ; 0x7c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000cd6: 2302 movs r3, #2 8000cd8: f8c7 3080 str.w r3, [r7, #128] ; 0x80 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000cdc: 2300 movs r3, #0 8000cde: f8c7 3084 str.w r3, [r7, #132] ; 0x84 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000ce2: 2303 movs r3, #3 8000ce4: f8c7 3088 str.w r3, [r7, #136] ; 0x88 GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 8000ce8: 2307 movs r3, #7 8000cea: f8c7 308c str.w r3, [r7, #140] ; 0x8c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000cee: f107 037c add.w r3, r7, #124 ; 0x7c 8000cf2: 4619 mov r1, r3 8000cf4: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 8000cf8: f000 fbf6 bl 80014e8 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); 8000cfc: 2200 movs r2, #0 8000cfe: 2100 movs r1, #0 8000d00: 2025 movs r0, #37 ; 0x25 8000d02: f000 fb3c bl 800137e HAL_NVIC_EnableIRQ(USART1_IRQn); 8000d06: 2025 movs r0, #37 ; 0x25 8000d08: f000 fb55 bl 80013b6 } 8000d0c: e03f b.n 8000d8e else if(huart->Instance==USART2) 8000d0e: 687b ldr r3, [r7, #4] 8000d10: 681b ldr r3, [r3, #0] 8000d12: 4a25 ldr r2, [pc, #148] ; (8000da8 ) 8000d14: 4293 cmp r3, r2 8000d16: d13a bne.n 8000d8e PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2; 8000d18: 2302 movs r3, #2 8000d1a: 623b str r3, [r7, #32] PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1; 8000d1c: 2300 movs r3, #0 8000d1e: 647b str r3, [r7, #68] ; 0x44 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) 8000d20: f107 0320 add.w r3, r7, #32 8000d24: 4618 mov r0, r3 8000d26: f001 fc0d bl 8002544 8000d2a: 4603 mov r3, r0 8000d2c: 2b00 cmp r3, #0 8000d2e: d001 beq.n 8000d34 Error_Handler(); 8000d30: f7ff ff1e bl 8000b70 __HAL_RCC_USART2_CLK_ENABLE(); 8000d34: 4b19 ldr r3, [pc, #100] ; (8000d9c ) 8000d36: 6d9b ldr r3, [r3, #88] ; 0x58 8000d38: 4a18 ldr r2, [pc, #96] ; (8000d9c ) 8000d3a: f443 3300 orr.w r3, r3, #131072 ; 0x20000 8000d3e: 6593 str r3, [r2, #88] ; 0x58 8000d40: 4b16 ldr r3, [pc, #88] ; (8000d9c ) 8000d42: 6d9b ldr r3, [r3, #88] ; 0x58 8000d44: f403 3300 and.w r3, r3, #131072 ; 0x20000 8000d48: 60fb str r3, [r7, #12] 8000d4a: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000d4c: 4b13 ldr r3, [pc, #76] ; (8000d9c ) 8000d4e: 6cdb ldr r3, [r3, #76] ; 0x4c 8000d50: 4a12 ldr r2, [pc, #72] ; (8000d9c ) 8000d52: f043 0301 orr.w r3, r3, #1 8000d56: 64d3 str r3, [r2, #76] ; 0x4c 8000d58: 4b10 ldr r3, [pc, #64] ; (8000d9c ) 8000d5a: 6cdb ldr r3, [r3, #76] ; 0x4c 8000d5c: f003 0301 and.w r3, r3, #1 8000d60: 60bb str r3, [r7, #8] 8000d62: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; 8000d64: 230c movs r3, #12 8000d66: 67fb str r3, [r7, #124] ; 0x7c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000d68: 2302 movs r3, #2 8000d6a: f8c7 3080 str.w r3, [r7, #128] ; 0x80 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000d6e: 2300 movs r3, #0 8000d70: f8c7 3084 str.w r3, [r7, #132] ; 0x84 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000d74: 2303 movs r3, #3 8000d76: f8c7 3088 str.w r3, [r7, #136] ; 0x88 GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 8000d7a: 2307 movs r3, #7 8000d7c: f8c7 308c str.w r3, [r7, #140] ; 0x8c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000d80: f107 037c add.w r3, r7, #124 ; 0x7c 8000d84: 4619 mov r1, r3 8000d86: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 8000d8a: f000 fbad bl 80014e8 } 8000d8e: bf00 nop 8000d90: 3790 adds r7, #144 ; 0x90 8000d92: 46bd mov sp, r7 8000d94: bd80 pop {r7, pc} 8000d96: bf00 nop 8000d98: 40008000 .word 0x40008000 8000d9c: 40021000 .word 0x40021000 8000da0: 48000800 .word 0x48000800 8000da4: 40013800 .word 0x40013800 8000da8: 40004400 .word 0x40004400 08000dac : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { 8000dac: b480 push {r7} 8000dae: b085 sub sp, #20 8000db0: af00 add r7, sp, #0 8000db2: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM1) 8000db4: 687b ldr r3, [r7, #4] 8000db6: 681b ldr r3, [r3, #0] 8000db8: 4a0a ldr r2, [pc, #40] ; (8000de4 ) 8000dba: 4293 cmp r3, r2 8000dbc: d10b bne.n 8000dd6 { /* USER CODE BEGIN TIM1_MspInit 0 */ /* USER CODE END TIM1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM1_CLK_ENABLE(); 8000dbe: 4b0a ldr r3, [pc, #40] ; (8000de8 ) 8000dc0: 6e1b ldr r3, [r3, #96] ; 0x60 8000dc2: 4a09 ldr r2, [pc, #36] ; (8000de8 ) 8000dc4: f443 6300 orr.w r3, r3, #2048 ; 0x800 8000dc8: 6613 str r3, [r2, #96] ; 0x60 8000dca: 4b07 ldr r3, [pc, #28] ; (8000de8 ) 8000dcc: 6e1b ldr r3, [r3, #96] ; 0x60 8000dce: f403 6300 and.w r3, r3, #2048 ; 0x800 8000dd2: 60fb str r3, [r7, #12] 8000dd4: 68fb ldr r3, [r7, #12] /* USER CODE BEGIN TIM1_MspInit 1 */ /* USER CODE END TIM1_MspInit 1 */ } } 8000dd6: bf00 nop 8000dd8: 3714 adds r7, #20 8000dda: 46bd mov sp, r7 8000ddc: f85d 7b04 ldr.w r7, [sp], #4 8000de0: 4770 bx lr 8000de2: bf00 nop 8000de4: 40012c00 .word 0x40012c00 8000de8: 40021000 .word 0x40021000 08000dec : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8000dec: b580 push {r7, lr} 8000dee: b088 sub sp, #32 8000df0: af00 add r7, sp, #0 8000df2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000df4: f107 030c add.w r3, r7, #12 8000df8: 2200 movs r2, #0 8000dfa: 601a str r2, [r3, #0] 8000dfc: 605a str r2, [r3, #4] 8000dfe: 609a str r2, [r3, #8] 8000e00: 60da str r2, [r3, #12] 8000e02: 611a str r2, [r3, #16] if(htim->Instance==TIM1) 8000e04: 687b ldr r3, [r7, #4] 8000e06: 681b ldr r3, [r3, #0] 8000e08: 4a12 ldr r2, [pc, #72] ; (8000e54 ) 8000e0a: 4293 cmp r3, r2 8000e0c: d11d bne.n 8000e4a { /* USER CODE BEGIN TIM1_MspPostInit 0 */ /* USER CODE END TIM1_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8000e0e: 4b12 ldr r3, [pc, #72] ; (8000e58 ) 8000e10: 6cdb ldr r3, [r3, #76] ; 0x4c 8000e12: 4a11 ldr r2, [pc, #68] ; (8000e58 ) 8000e14: f043 0301 orr.w r3, r3, #1 8000e18: 64d3 str r3, [r2, #76] ; 0x4c 8000e1a: 4b0f ldr r3, [pc, #60] ; (8000e58 ) 8000e1c: 6cdb ldr r3, [r3, #76] ; 0x4c 8000e1e: f003 0301 and.w r3, r3, #1 8000e22: 60bb str r3, [r7, #8] 8000e24: 68bb ldr r3, [r7, #8] /**TIM1 GPIO Configuration PA8 ------> TIM1_CH1 */ GPIO_InitStruct.Pin = GPIO_PIN_8; 8000e26: f44f 7380 mov.w r3, #256 ; 0x100 8000e2a: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000e2c: 2302 movs r3, #2 8000e2e: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000e30: 2300 movs r3, #0 8000e32: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000e34: 2300 movs r3, #0 8000e36: 61bb str r3, [r7, #24] GPIO_InitStruct.Alternate = GPIO_AF1_TIM1; 8000e38: 2301 movs r3, #1 8000e3a: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000e3c: f107 030c add.w r3, r7, #12 8000e40: 4619 mov r1, r3 8000e42: f04f 4090 mov.w r0, #1207959552 ; 0x48000000 8000e46: f000 fb4f bl 80014e8 /* USER CODE BEGIN TIM1_MspPostInit 1 */ /* USER CODE END TIM1_MspPostInit 1 */ } } 8000e4a: bf00 nop 8000e4c: 3720 adds r7, #32 8000e4e: 46bd mov sp, r7 8000e50: bd80 pop {r7, pc} 8000e52: bf00 nop 8000e54: 40012c00 .word 0x40012c00 8000e58: 40021000 .word 0x40021000 08000e5c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8000e5c: b480 push {r7} 8000e5e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8000e60: e7fe b.n 8000e60 08000e62 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8000e62: b480 push {r7} 8000e64: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8000e66: e7fe b.n 8000e66 08000e68 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8000e68: b480 push {r7} 8000e6a: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8000e6c: e7fe b.n 8000e6c 08000e6e : /** * @brief This function handles Prefetch fault, memory access fault. */ void BusFault_Handler(void) { 8000e6e: b480 push {r7} 8000e70: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8000e72: e7fe b.n 8000e72 08000e74 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8000e74: b480 push {r7} 8000e76: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8000e78: e7fe b.n 8000e78 08000e7a : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8000e7a: b480 push {r7} 8000e7c: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8000e7e: bf00 nop 8000e80: 46bd mov sp, r7 8000e82: f85d 7b04 ldr.w r7, [sp], #4 8000e86: 4770 bx lr 08000e88 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8000e88: b480 push {r7} 8000e8a: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8000e8c: bf00 nop 8000e8e: 46bd mov sp, r7 8000e90: f85d 7b04 ldr.w r7, [sp], #4 8000e94: 4770 bx lr 08000e96 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8000e96: b480 push {r7} 8000e98: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8000e9a: bf00 nop 8000e9c: 46bd mov sp, r7 8000e9e: f85d 7b04 ldr.w r7, [sp], #4 8000ea2: 4770 bx lr 08000ea4 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8000ea4: b580 push {r7, lr} 8000ea6: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8000ea8: f000 f94a bl 8001140 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8000eac: bf00 nop 8000eae: bd80 pop {r7, pc} 08000eb0 : /** * @brief This function handles USART1 global interrupt. */ void USART1_IRQHandler(void) { 8000eb0: b580 push {r7, lr} 8000eb2: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); 8000eb4: 4802 ldr r0, [pc, #8] ; (8000ec0 ) 8000eb6: f002 ffc5 bl 8003e44 /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } 8000eba: bf00 nop 8000ebc: bd80 pop {r7, pc} 8000ebe: bf00 nop 8000ec0: 20000110 .word 0x20000110 08000ec4 : /** * @brief This function handles LPUART1 global interrupt. */ void LPUART1_IRQHandler(void) { 8000ec4: b580 push {r7, lr} 8000ec6: af00 add r7, sp, #0 /* USER CODE BEGIN LPUART1_IRQn 0 */ /* USER CODE END LPUART1_IRQn 0 */ HAL_UART_IRQHandler(&hlpuart1); 8000ec8: 4802 ldr r0, [pc, #8] ; (8000ed4 ) 8000eca: f002 ffbb bl 8003e44 /* USER CODE BEGIN LPUART1_IRQn 1 */ /* USER CODE END LPUART1_IRQn 1 */ } 8000ece: bf00 nop 8000ed0: bd80 pop {r7, pc} 8000ed2: bf00 nop 8000ed4: 20000088 .word 0x20000088 08000ed8 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8000ed8: b580 push {r7, lr} 8000eda: b086 sub sp, #24 8000edc: af00 add r7, sp, #0 8000ede: 60f8 str r0, [r7, #12] 8000ee0: 60b9 str r1, [r7, #8] 8000ee2: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8000ee4: 2300 movs r3, #0 8000ee6: 617b str r3, [r7, #20] 8000ee8: e00a b.n 8000f00 <_read+0x28> { *ptr++ = __io_getchar(); 8000eea: f3af 8000 nop.w 8000eee: 4601 mov r1, r0 8000ef0: 68bb ldr r3, [r7, #8] 8000ef2: 1c5a adds r2, r3, #1 8000ef4: 60ba str r2, [r7, #8] 8000ef6: b2ca uxtb r2, r1 8000ef8: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 8000efa: 697b ldr r3, [r7, #20] 8000efc: 3301 adds r3, #1 8000efe: 617b str r3, [r7, #20] 8000f00: 697a ldr r2, [r7, #20] 8000f02: 687b ldr r3, [r7, #4] 8000f04: 429a cmp r2, r3 8000f06: dbf0 blt.n 8000eea <_read+0x12> } return len; 8000f08: 687b ldr r3, [r7, #4] } 8000f0a: 4618 mov r0, r3 8000f0c: 3718 adds r7, #24 8000f0e: 46bd mov sp, r7 8000f10: bd80 pop {r7, pc} 08000f12 <_write>: __attribute__((weak)) int _write(int file, char *ptr, int len) { 8000f12: b580 push {r7, lr} 8000f14: b086 sub sp, #24 8000f16: af00 add r7, sp, #0 8000f18: 60f8 str r0, [r7, #12] 8000f1a: 60b9 str r1, [r7, #8] 8000f1c: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8000f1e: 2300 movs r3, #0 8000f20: 617b str r3, [r7, #20] 8000f22: e009 b.n 8000f38 <_write+0x26> { __io_putchar(*ptr++); 8000f24: 68bb ldr r3, [r7, #8] 8000f26: 1c5a adds r2, r3, #1 8000f28: 60ba str r2, [r7, #8] 8000f2a: 781b ldrb r3, [r3, #0] 8000f2c: 4618 mov r0, r3 8000f2e: f3af 8000 nop.w for (DataIdx = 0; DataIdx < len; DataIdx++) 8000f32: 697b ldr r3, [r7, #20] 8000f34: 3301 adds r3, #1 8000f36: 617b str r3, [r7, #20] 8000f38: 697a ldr r2, [r7, #20] 8000f3a: 687b ldr r3, [r7, #4] 8000f3c: 429a cmp r2, r3 8000f3e: dbf1 blt.n 8000f24 <_write+0x12> } return len; 8000f40: 687b ldr r3, [r7, #4] } 8000f42: 4618 mov r0, r3 8000f44: 3718 adds r7, #24 8000f46: 46bd mov sp, r7 8000f48: bd80 pop {r7, pc} 08000f4a <_close>: int _close(int file) { 8000f4a: b480 push {r7} 8000f4c: b083 sub sp, #12 8000f4e: af00 add r7, sp, #0 8000f50: 6078 str r0, [r7, #4] (void)file; return -1; 8000f52: f04f 33ff mov.w r3, #4294967295 } 8000f56: 4618 mov r0, r3 8000f58: 370c adds r7, #12 8000f5a: 46bd mov sp, r7 8000f5c: f85d 7b04 ldr.w r7, [sp], #4 8000f60: 4770 bx lr 08000f62 <_fstat>: int _fstat(int file, struct stat *st) { 8000f62: b480 push {r7} 8000f64: b083 sub sp, #12 8000f66: af00 add r7, sp, #0 8000f68: 6078 str r0, [r7, #4] 8000f6a: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 8000f6c: 683b ldr r3, [r7, #0] 8000f6e: f44f 5200 mov.w r2, #8192 ; 0x2000 8000f72: 605a str r2, [r3, #4] return 0; 8000f74: 2300 movs r3, #0 } 8000f76: 4618 mov r0, r3 8000f78: 370c adds r7, #12 8000f7a: 46bd mov sp, r7 8000f7c: f85d 7b04 ldr.w r7, [sp], #4 8000f80: 4770 bx lr 08000f82 <_isatty>: int _isatty(int file) { 8000f82: b480 push {r7} 8000f84: b083 sub sp, #12 8000f86: af00 add r7, sp, #0 8000f88: 6078 str r0, [r7, #4] (void)file; return 1; 8000f8a: 2301 movs r3, #1 } 8000f8c: 4618 mov r0, r3 8000f8e: 370c adds r7, #12 8000f90: 46bd mov sp, r7 8000f92: f85d 7b04 ldr.w r7, [sp], #4 8000f96: 4770 bx lr 08000f98 <_lseek>: int _lseek(int file, int ptr, int dir) { 8000f98: b480 push {r7} 8000f9a: b085 sub sp, #20 8000f9c: af00 add r7, sp, #0 8000f9e: 60f8 str r0, [r7, #12] 8000fa0: 60b9 str r1, [r7, #8] 8000fa2: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 8000fa4: 2300 movs r3, #0 } 8000fa6: 4618 mov r0, r3 8000fa8: 3714 adds r7, #20 8000faa: 46bd mov sp, r7 8000fac: f85d 7b04 ldr.w r7, [sp], #4 8000fb0: 4770 bx lr ... 08000fb4 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8000fb4: b580 push {r7, lr} 8000fb6: b086 sub sp, #24 8000fb8: af00 add r7, sp, #0 8000fba: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8000fbc: 4a14 ldr r2, [pc, #80] ; (8001010 <_sbrk+0x5c>) 8000fbe: 4b15 ldr r3, [pc, #84] ; (8001014 <_sbrk+0x60>) 8000fc0: 1ad3 subs r3, r2, r3 8000fc2: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8000fc4: 697b ldr r3, [r7, #20] 8000fc6: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 8000fc8: 4b13 ldr r3, [pc, #76] ; (8001018 <_sbrk+0x64>) 8000fca: 681b ldr r3, [r3, #0] 8000fcc: 2b00 cmp r3, #0 8000fce: d102 bne.n 8000fd6 <_sbrk+0x22> { __sbrk_heap_end = &_end; 8000fd0: 4b11 ldr r3, [pc, #68] ; (8001018 <_sbrk+0x64>) 8000fd2: 4a12 ldr r2, [pc, #72] ; (800101c <_sbrk+0x68>) 8000fd4: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 8000fd6: 4b10 ldr r3, [pc, #64] ; (8001018 <_sbrk+0x64>) 8000fd8: 681a ldr r2, [r3, #0] 8000fda: 687b ldr r3, [r7, #4] 8000fdc: 4413 add r3, r2 8000fde: 693a ldr r2, [r7, #16] 8000fe0: 429a cmp r2, r3 8000fe2: d207 bcs.n 8000ff4 <_sbrk+0x40> { errno = ENOMEM; 8000fe4: f004 fcb8 bl 8005958 <__errno> 8000fe8: 4603 mov r3, r0 8000fea: 220c movs r2, #12 8000fec: 601a str r2, [r3, #0] return (void *)-1; 8000fee: f04f 33ff mov.w r3, #4294967295 8000ff2: e009 b.n 8001008 <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 8000ff4: 4b08 ldr r3, [pc, #32] ; (8001018 <_sbrk+0x64>) 8000ff6: 681b ldr r3, [r3, #0] 8000ff8: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 8000ffa: 4b07 ldr r3, [pc, #28] ; (8001018 <_sbrk+0x64>) 8000ffc: 681a ldr r2, [r3, #0] 8000ffe: 687b ldr r3, [r7, #4] 8001000: 4413 add r3, r2 8001002: 4a05 ldr r2, [pc, #20] ; (8001018 <_sbrk+0x64>) 8001004: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 8001006: 68fb ldr r3, [r7, #12] } 8001008: 4618 mov r0, r3 800100a: 3718 adds r7, #24 800100c: 46bd mov sp, r7 800100e: bd80 pop {r7, pc} 8001010: 20010000 .word 0x20010000 8001014: 00000400 .word 0x00000400 8001018: 200002a4 .word 0x200002a4 800101c: 200003f8 .word 0x200003f8 08001020 : * @brief Setup the microcontroller system. * @retval None */ void SystemInit(void) { 8001020: b480 push {r7} 8001022: af00 add r7, sp, #0 SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; #endif /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 20U)|(3UL << 22U)); /* set CP10 and CP11 Full Access */ 8001024: 4b06 ldr r3, [pc, #24] ; (8001040 ) 8001026: f8d3 3088 ldr.w r3, [r3, #136] ; 0x88 800102a: 4a05 ldr r2, [pc, #20] ; (8001040 ) 800102c: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000 8001030: f8c2 3088 str.w r3, [r2, #136] ; 0x88 #endif } 8001034: bf00 nop 8001036: 46bd mov sp, r7 8001038: f85d 7b04 ldr.w r7, [sp], #4 800103c: 4770 bx lr 800103e: bf00 nop 8001040: e000ed00 .word 0xe000ed00 08001044 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Set stack pointer */ 8001044: f8df d034 ldr.w sp, [pc, #52] ; 800107c /* Call the clock system initialization function.*/ bl SystemInit 8001048: f7ff ffea bl 8001020 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 800104c: 480c ldr r0, [pc, #48] ; (8001080 ) ldr r1, =_edata 800104e: 490d ldr r1, [pc, #52] ; (8001084 ) ldr r2, =_sidata 8001050: 4a0d ldr r2, [pc, #52] ; (8001088 ) movs r3, #0 8001052: 2300 movs r3, #0 b LoopCopyDataInit 8001054: e002 b.n 800105c 08001056 : CopyDataInit: ldr r4, [r2, r3] 8001056: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8001058: 50c4 str r4, [r0, r3] adds r3, r3, #4 800105a: 3304 adds r3, #4 0800105c : LoopCopyDataInit: adds r4, r0, r3 800105c: 18c4 adds r4, r0, r3 cmp r4, r1 800105e: 428c cmp r4, r1 bcc CopyDataInit 8001060: d3f9 bcc.n 8001056 /* Zero fill the bss segment. */ ldr r2, =_sbss 8001062: 4a0a ldr r2, [pc, #40] ; (800108c ) ldr r4, =_ebss 8001064: 4c0a ldr r4, [pc, #40] ; (8001090 ) movs r3, #0 8001066: 2300 movs r3, #0 b LoopFillZerobss 8001068: e001 b.n 800106e 0800106a : FillZerobss: str r3, [r2] 800106a: 6013 str r3, [r2, #0] adds r2, r2, #4 800106c: 3204 adds r2, #4 0800106e : LoopFillZerobss: cmp r2, r4 800106e: 42a2 cmp r2, r4 bcc FillZerobss 8001070: d3fb bcc.n 800106a /* Call static constructors */ bl __libc_init_array 8001072: f004 fc77 bl 8005964 <__libc_init_array> /* Call the application's entry point.*/ bl main 8001076: f7ff fb55 bl 8000724

0800107a : LoopForever: b LoopForever 800107a: e7fe b.n 800107a ldr sp, =_estack /* Set stack pointer */ 800107c: 20010000 .word 0x20010000 ldr r0, =_sdata 8001080: 20000000 .word 0x20000000 ldr r1, =_edata 8001084: 2000006c .word 0x2000006c ldr r2, =_sidata 8001088: 08005f70 .word 0x08005f70 ldr r2, =_sbss 800108c: 2000006c .word 0x2000006c ldr r4, =_ebss 8001090: 200003f8 .word 0x200003f8 08001094 : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001094: e7fe b.n 8001094 08001096 : * each 1ms in the SysTick_Handler() interrupt handler. * * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001096: b580 push {r7, lr} 8001098: b082 sub sp, #8 800109a: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; 800109c: 2300 movs r3, #0 800109e: 71fb strb r3, [r7, #7] #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80010a0: 2003 movs r0, #3 80010a2: f000 f961 bl 8001368 /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) 80010a6: 200f movs r0, #15 80010a8: f000 f80e bl 80010c8 80010ac: 4603 mov r3, r0 80010ae: 2b00 cmp r3, #0 80010b0: d002 beq.n 80010b8 { status = HAL_ERROR; 80010b2: 2301 movs r3, #1 80010b4: 71fb strb r3, [r7, #7] 80010b6: e001 b.n 80010bc } else { /* Init the low level hardware */ HAL_MspInit(); 80010b8: f7ff fd60 bl 8000b7c } /* Return function status */ return status; 80010bc: 79fb ldrb r3, [r7, #7] } 80010be: 4618 mov r0, r3 80010c0: 3708 adds r7, #8 80010c2: 46bd mov sp, r7 80010c4: bd80 pop {r7, pc} ... 080010c8 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 80010c8: b580 push {r7, lr} 80010ca: b084 sub sp, #16 80010cc: af00 add r7, sp, #0 80010ce: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80010d0: 2300 movs r3, #0 80010d2: 73fb strb r3, [r7, #15] /* Check uwTickFreq for MisraC 2012 (even if uwTickFreq is a enum type that doesn't take the value zero)*/ if ((uint32_t)uwTickFreq != 0U) 80010d4: 4b17 ldr r3, [pc, #92] ; (8001134 ) 80010d6: 781b ldrb r3, [r3, #0] 80010d8: 2b00 cmp r3, #0 80010da: d023 beq.n 8001124 { /*Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / (uint32_t)uwTickFreq)) == 0U) 80010dc: 4b16 ldr r3, [pc, #88] ; (8001138 ) 80010de: 681a ldr r2, [r3, #0] 80010e0: 4b14 ldr r3, [pc, #80] ; (8001134 ) 80010e2: 781b ldrb r3, [r3, #0] 80010e4: 4619 mov r1, r3 80010e6: f44f 737a mov.w r3, #1000 ; 0x3e8 80010ea: fbb3 f3f1 udiv r3, r3, r1 80010ee: fbb2 f3f3 udiv r3, r2, r3 80010f2: 4618 mov r0, r3 80010f4: f000 f96d bl 80013d2 80010f8: 4603 mov r3, r0 80010fa: 2b00 cmp r3, #0 80010fc: d10f bne.n 800111e { /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80010fe: 687b ldr r3, [r7, #4] 8001100: 2b0f cmp r3, #15 8001102: d809 bhi.n 8001118 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001104: 2200 movs r2, #0 8001106: 6879 ldr r1, [r7, #4] 8001108: f04f 30ff mov.w r0, #4294967295 800110c: f000 f937 bl 800137e uwTickPrio = TickPriority; 8001110: 4a0a ldr r2, [pc, #40] ; (800113c ) 8001112: 687b ldr r3, [r7, #4] 8001114: 6013 str r3, [r2, #0] 8001116: e007 b.n 8001128 } else { status = HAL_ERROR; 8001118: 2301 movs r3, #1 800111a: 73fb strb r3, [r7, #15] 800111c: e004 b.n 8001128 } } else { status = HAL_ERROR; 800111e: 2301 movs r3, #1 8001120: 73fb strb r3, [r7, #15] 8001122: e001 b.n 8001128 } } else { status = HAL_ERROR; 8001124: 2301 movs r3, #1 8001126: 73fb strb r3, [r7, #15] } /* Return function status */ return status; 8001128: 7bfb ldrb r3, [r7, #15] } 800112a: 4618 mov r0, r3 800112c: 3710 adds r7, #16 800112e: 46bd mov sp, r7 8001130: bd80 pop {r7, pc} 8001132: bf00 nop 8001134: 2000000c .word 0x2000000c 8001138: 20000004 .word 0x20000004 800113c: 20000008 .word 0x20000008 08001140 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001140: b480 push {r7} 8001142: af00 add r7, sp, #0 uwTick += (uint32_t)uwTickFreq; 8001144: 4b06 ldr r3, [pc, #24] ; (8001160 ) 8001146: 781b ldrb r3, [r3, #0] 8001148: 461a mov r2, r3 800114a: 4b06 ldr r3, [pc, #24] ; (8001164 ) 800114c: 681b ldr r3, [r3, #0] 800114e: 4413 add r3, r2 8001150: 4a04 ldr r2, [pc, #16] ; (8001164 ) 8001152: 6013 str r3, [r2, #0] } 8001154: bf00 nop 8001156: 46bd mov sp, r7 8001158: f85d 7b04 ldr.w r7, [sp], #4 800115c: 4770 bx lr 800115e: bf00 nop 8001160: 2000000c .word 0x2000000c 8001164: 200002a8 .word 0x200002a8 08001168 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001168: b480 push {r7} 800116a: af00 add r7, sp, #0 return uwTick; 800116c: 4b03 ldr r3, [pc, #12] ; (800117c ) 800116e: 681b ldr r3, [r3, #0] } 8001170: 4618 mov r0, r3 8001172: 46bd mov sp, r7 8001174: f85d 7b04 ldr.w r7, [sp], #4 8001178: 4770 bx lr 800117a: bf00 nop 800117c: 200002a8 .word 0x200002a8 08001180 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8001180: b580 push {r7, lr} 8001182: b084 sub sp, #16 8001184: af00 add r7, sp, #0 8001186: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8001188: f7ff ffee bl 8001168 800118c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800118e: 687b ldr r3, [r7, #4] 8001190: 60fb str r3, [r7, #12] /* Add a period to guaranty minimum wait */ if (wait < HAL_MAX_DELAY) 8001192: 68fb ldr r3, [r7, #12] 8001194: f1b3 3fff cmp.w r3, #4294967295 8001198: d005 beq.n 80011a6 { wait += (uint32_t)uwTickFreq; 800119a: 4b0a ldr r3, [pc, #40] ; (80011c4 ) 800119c: 781b ldrb r3, [r3, #0] 800119e: 461a mov r2, r3 80011a0: 68fb ldr r3, [r7, #12] 80011a2: 4413 add r3, r2 80011a4: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 80011a6: bf00 nop 80011a8: f7ff ffde bl 8001168 80011ac: 4602 mov r2, r0 80011ae: 68bb ldr r3, [r7, #8] 80011b0: 1ad3 subs r3, r2, r3 80011b2: 68fa ldr r2, [r7, #12] 80011b4: 429a cmp r2, r3 80011b6: d8f7 bhi.n 80011a8 { } } 80011b8: bf00 nop 80011ba: bf00 nop 80011bc: 3710 adds r7, #16 80011be: 46bd mov sp, r7 80011c0: bd80 pop {r7, pc} 80011c2: bf00 nop 80011c4: 2000000c .word 0x2000000c 080011c8 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80011c8: b480 push {r7} 80011ca: b085 sub sp, #20 80011cc: af00 add r7, sp, #0 80011ce: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80011d0: 687b ldr r3, [r7, #4] 80011d2: f003 0307 and.w r3, r3, #7 80011d6: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 80011d8: 4b0c ldr r3, [pc, #48] ; (800120c <__NVIC_SetPriorityGrouping+0x44>) 80011da: 68db ldr r3, [r3, #12] 80011dc: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80011de: 68ba ldr r2, [r7, #8] 80011e0: f64f 03ff movw r3, #63743 ; 0xf8ff 80011e4: 4013 ands r3, r2 80011e6: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80011e8: 68fb ldr r3, [r7, #12] 80011ea: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80011ec: 68bb ldr r3, [r7, #8] 80011ee: 4313 orrs r3, r2 reg_value = (reg_value | 80011f0: f043 63bf orr.w r3, r3, #100139008 ; 0x5f80000 80011f4: f443 3300 orr.w r3, r3, #131072 ; 0x20000 80011f8: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80011fa: 4a04 ldr r2, [pc, #16] ; (800120c <__NVIC_SetPriorityGrouping+0x44>) 80011fc: 68bb ldr r3, [r7, #8] 80011fe: 60d3 str r3, [r2, #12] } 8001200: bf00 nop 8001202: 3714 adds r7, #20 8001204: 46bd mov sp, r7 8001206: f85d 7b04 ldr.w r7, [sp], #4 800120a: 4770 bx lr 800120c: e000ed00 .word 0xe000ed00 08001210 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8001210: b480 push {r7} 8001212: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001214: 4b04 ldr r3, [pc, #16] ; (8001228 <__NVIC_GetPriorityGrouping+0x18>) 8001216: 68db ldr r3, [r3, #12] 8001218: 0a1b lsrs r3, r3, #8 800121a: f003 0307 and.w r3, r3, #7 } 800121e: 4618 mov r0, r3 8001220: 46bd mov sp, r7 8001222: f85d 7b04 ldr.w r7, [sp], #4 8001226: 4770 bx lr 8001228: e000ed00 .word 0xe000ed00 0800122c <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 800122c: b480 push {r7} 800122e: b083 sub sp, #12 8001230: af00 add r7, sp, #0 8001232: 4603 mov r3, r0 8001234: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001236: f997 3007 ldrsb.w r3, [r7, #7] 800123a: 2b00 cmp r3, #0 800123c: db0b blt.n 8001256 <__NVIC_EnableIRQ+0x2a> { __COMPILER_BARRIER(); NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 800123e: 79fb ldrb r3, [r7, #7] 8001240: f003 021f and.w r2, r3, #31 8001244: 4907 ldr r1, [pc, #28] ; (8001264 <__NVIC_EnableIRQ+0x38>) 8001246: f997 3007 ldrsb.w r3, [r7, #7] 800124a: 095b lsrs r3, r3, #5 800124c: 2001 movs r0, #1 800124e: fa00 f202 lsl.w r2, r0, r2 8001252: f841 2023 str.w r2, [r1, r3, lsl #2] __COMPILER_BARRIER(); } } 8001256: bf00 nop 8001258: 370c adds r7, #12 800125a: 46bd mov sp, r7 800125c: f85d 7b04 ldr.w r7, [sp], #4 8001260: 4770 bx lr 8001262: bf00 nop 8001264: e000e100 .word 0xe000e100 08001268 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8001268: b480 push {r7} 800126a: b083 sub sp, #12 800126c: af00 add r7, sp, #0 800126e: 4603 mov r3, r0 8001270: 6039 str r1, [r7, #0] 8001272: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001274: f997 3007 ldrsb.w r3, [r7, #7] 8001278: 2b00 cmp r3, #0 800127a: db0a blt.n 8001292 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800127c: 683b ldr r3, [r7, #0] 800127e: b2da uxtb r2, r3 8001280: 490c ldr r1, [pc, #48] ; (80012b4 <__NVIC_SetPriority+0x4c>) 8001282: f997 3007 ldrsb.w r3, [r7, #7] 8001286: 0112 lsls r2, r2, #4 8001288: b2d2 uxtb r2, r2 800128a: 440b add r3, r1 800128c: f883 2300 strb.w r2, [r3, #768] ; 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8001290: e00a b.n 80012a8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001292: 683b ldr r3, [r7, #0] 8001294: b2da uxtb r2, r3 8001296: 4908 ldr r1, [pc, #32] ; (80012b8 <__NVIC_SetPriority+0x50>) 8001298: 79fb ldrb r3, [r7, #7] 800129a: f003 030f and.w r3, r3, #15 800129e: 3b04 subs r3, #4 80012a0: 0112 lsls r2, r2, #4 80012a2: b2d2 uxtb r2, r2 80012a4: 440b add r3, r1 80012a6: 761a strb r2, [r3, #24] } 80012a8: bf00 nop 80012aa: 370c adds r7, #12 80012ac: 46bd mov sp, r7 80012ae: f85d 7b04 ldr.w r7, [sp], #4 80012b2: 4770 bx lr 80012b4: e000e100 .word 0xe000e100 80012b8: e000ed00 .word 0xe000ed00 080012bc : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 80012bc: b480 push {r7} 80012be: b089 sub sp, #36 ; 0x24 80012c0: af00 add r7, sp, #0 80012c2: 60f8 str r0, [r7, #12] 80012c4: 60b9 str r1, [r7, #8] 80012c6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80012c8: 68fb ldr r3, [r7, #12] 80012ca: f003 0307 and.w r3, r3, #7 80012ce: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80012d0: 69fb ldr r3, [r7, #28] 80012d2: f1c3 0307 rsb r3, r3, #7 80012d6: 2b04 cmp r3, #4 80012d8: bf28 it cs 80012da: 2304 movcs r3, #4 80012dc: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80012de: 69fb ldr r3, [r7, #28] 80012e0: 3304 adds r3, #4 80012e2: 2b06 cmp r3, #6 80012e4: d902 bls.n 80012ec 80012e6: 69fb ldr r3, [r7, #28] 80012e8: 3b03 subs r3, #3 80012ea: e000 b.n 80012ee 80012ec: 2300 movs r3, #0 80012ee: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80012f0: f04f 32ff mov.w r2, #4294967295 80012f4: 69bb ldr r3, [r7, #24] 80012f6: fa02 f303 lsl.w r3, r2, r3 80012fa: 43da mvns r2, r3 80012fc: 68bb ldr r3, [r7, #8] 80012fe: 401a ands r2, r3 8001300: 697b ldr r3, [r7, #20] 8001302: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8001304: f04f 31ff mov.w r1, #4294967295 8001308: 697b ldr r3, [r7, #20] 800130a: fa01 f303 lsl.w r3, r1, r3 800130e: 43d9 mvns r1, r3 8001310: 687b ldr r3, [r7, #4] 8001312: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001314: 4313 orrs r3, r2 ); } 8001316: 4618 mov r0, r3 8001318: 3724 adds r7, #36 ; 0x24 800131a: 46bd mov sp, r7 800131c: f85d 7b04 ldr.w r7, [sp], #4 8001320: 4770 bx lr ... 08001324 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8001324: b580 push {r7, lr} 8001326: b082 sub sp, #8 8001328: af00 add r7, sp, #0 800132a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 800132c: 687b ldr r3, [r7, #4] 800132e: 3b01 subs r3, #1 8001330: f1b3 7f80 cmp.w r3, #16777216 ; 0x1000000 8001334: d301 bcc.n 800133a { return (1UL); /* Reload value impossible */ 8001336: 2301 movs r3, #1 8001338: e00f b.n 800135a } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800133a: 4a0a ldr r2, [pc, #40] ; (8001364 ) 800133c: 687b ldr r3, [r7, #4] 800133e: 3b01 subs r3, #1 8001340: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8001342: 210f movs r1, #15 8001344: f04f 30ff mov.w r0, #4294967295 8001348: f7ff ff8e bl 8001268 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 800134c: 4b05 ldr r3, [pc, #20] ; (8001364 ) 800134e: 2200 movs r2, #0 8001350: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8001352: 4b04 ldr r3, [pc, #16] ; (8001364 ) 8001354: 2207 movs r2, #7 8001356: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8001358: 2300 movs r3, #0 } 800135a: 4618 mov r0, r3 800135c: 3708 adds r7, #8 800135e: 46bd mov sp, r7 8001360: bd80 pop {r7, pc} 8001362: bf00 nop 8001364: e000e010 .word 0xe000e010 08001368 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001368: b580 push {r7, lr} 800136a: b082 sub sp, #8 800136c: af00 add r7, sp, #0 800136e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8001370: 6878 ldr r0, [r7, #4] 8001372: f7ff ff29 bl 80011c8 <__NVIC_SetPriorityGrouping> } 8001376: bf00 nop 8001378: 3708 adds r7, #8 800137a: 46bd mov sp, r7 800137c: bd80 pop {r7, pc} 0800137e : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800137e: b580 push {r7, lr} 8001380: b086 sub sp, #24 8001382: af00 add r7, sp, #0 8001384: 4603 mov r3, r0 8001386: 60b9 str r1, [r7, #8] 8001388: 607a str r2, [r7, #4] 800138a: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00; 800138c: 2300 movs r3, #0 800138e: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8001390: f7ff ff3e bl 8001210 <__NVIC_GetPriorityGrouping> 8001394: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8001396: 687a ldr r2, [r7, #4] 8001398: 68b9 ldr r1, [r7, #8] 800139a: 6978 ldr r0, [r7, #20] 800139c: f7ff ff8e bl 80012bc 80013a0: 4602 mov r2, r0 80013a2: f997 300f ldrsb.w r3, [r7, #15] 80013a6: 4611 mov r1, r2 80013a8: 4618 mov r0, r3 80013aa: f7ff ff5d bl 8001268 <__NVIC_SetPriority> } 80013ae: bf00 nop 80013b0: 3718 adds r7, #24 80013b2: 46bd mov sp, r7 80013b4: bd80 pop {r7, pc} 080013b6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32l4xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80013b6: b580 push {r7, lr} 80013b8: b082 sub sp, #8 80013ba: af00 add r7, sp, #0 80013bc: 4603 mov r3, r0 80013be: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80013c0: f997 3007 ldrsb.w r3, [r7, #7] 80013c4: 4618 mov r0, r3 80013c6: f7ff ff31 bl 800122c <__NVIC_EnableIRQ> } 80013ca: bf00 nop 80013cc: 3708 adds r7, #8 80013ce: 46bd mov sp, r7 80013d0: bd80 pop {r7, pc} 080013d2 : * @param TicksNumb: Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80013d2: b580 push {r7, lr} 80013d4: b082 sub sp, #8 80013d6: af00 add r7, sp, #0 80013d8: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80013da: 6878 ldr r0, [r7, #4] 80013dc: f7ff ffa2 bl 8001324 80013e0: 4603 mov r3, r0 } 80013e2: 4618 mov r0, r3 80013e4: 3708 adds r7, #8 80013e6: 46bd mov sp, r7 80013e8: bd80 pop {r7, pc} 080013ea : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { 80013ea: b480 push {r7} 80013ec: b085 sub sp, #20 80013ee: af00 add r7, sp, #0 80013f0: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80013f2: 2300 movs r3, #0 80013f4: 73fb strb r3, [r7, #15] /* Check the DMA peripheral state */ if (hdma->State != HAL_DMA_STATE_BUSY) 80013f6: 687b ldr r3, [r7, #4] 80013f8: f893 3025 ldrb.w r3, [r3, #37] ; 0x25 80013fc: b2db uxtb r3, r3 80013fe: 2b02 cmp r3, #2 8001400: d008 beq.n 8001414 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 8001402: 687b ldr r3, [r7, #4] 8001404: 2204 movs r2, #4 8001406: 63da str r2, [r3, #60] ; 0x3c /* Process Unlocked */ __HAL_UNLOCK(hdma); 8001408: 687b ldr r3, [r7, #4] 800140a: 2200 movs r2, #0 800140c: f883 2024 strb.w r2, [r3, #36] ; 0x24 return HAL_ERROR; 8001410: 2301 movs r3, #1 8001412: e022 b.n 800145a } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 8001414: 687b ldr r3, [r7, #4] 8001416: 681b ldr r3, [r3, #0] 8001418: 681a ldr r2, [r3, #0] 800141a: 687b ldr r3, [r7, #4] 800141c: 681b ldr r3, [r3, #0] 800141e: f022 020e bic.w r2, r2, #14 8001422: 601a str r2, [r3, #0] /* disable the DMAMUX sync overrun IT*/ hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE; #endif /* DMAMUX1 */ /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 8001424: 687b ldr r3, [r7, #4] 8001426: 681b ldr r3, [r3, #0] 8001428: 681a ldr r2, [r3, #0] 800142a: 687b ldr r3, [r7, #4] 800142c: 681b ldr r3, [r3, #0] 800142e: f022 0201 bic.w r2, r2, #1 8001432: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); 8001434: 687b ldr r3, [r7, #4] 8001436: 6c5b ldr r3, [r3, #68] ; 0x44 8001438: f003 021c and.w r2, r3, #28 800143c: 687b ldr r3, [r7, #4] 800143e: 6c1b ldr r3, [r3, #64] ; 0x40 8001440: 2101 movs r1, #1 8001442: fa01 f202 lsl.w r2, r1, r2 8001446: 605a str r2, [r3, #4] } #endif /* DMAMUX1 */ /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 8001448: 687b ldr r3, [r7, #4] 800144a: 2201 movs r2, #1 800144c: f883 2025 strb.w r2, [r3, #37] ; 0x25 /* Process Unlocked */ __HAL_UNLOCK(hdma); 8001450: 687b ldr r3, [r7, #4] 8001452: 2200 movs r2, #0 8001454: f883 2024 strb.w r2, [r3, #36] ; 0x24 return status; 8001458: 7bfb ldrb r3, [r7, #15] } } 800145a: 4618 mov r0, r3 800145c: 3714 adds r7, #20 800145e: 46bd mov sp, r7 8001460: f85d 7b04 ldr.w r7, [sp], #4 8001464: 4770 bx lr 08001466 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { 8001466: b580 push {r7, lr} 8001468: b084 sub sp, #16 800146a: af00 add r7, sp, #0 800146c: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 800146e: 2300 movs r3, #0 8001470: 73fb strb r3, [r7, #15] if (HAL_DMA_STATE_BUSY != hdma->State) 8001472: 687b ldr r3, [r7, #4] 8001474: f893 3025 ldrb.w r3, [r3, #37] ; 0x25 8001478: b2db uxtb r3, r3 800147a: 2b02 cmp r3, #2 800147c: d005 beq.n 800148a { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; 800147e: 687b ldr r3, [r7, #4] 8001480: 2204 movs r2, #4 8001482: 63da str r2, [r3, #60] ; 0x3c status = HAL_ERROR; 8001484: 2301 movs r3, #1 8001486: 73fb strb r3, [r7, #15] 8001488: e029 b.n 80014de } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); 800148a: 687b ldr r3, [r7, #4] 800148c: 681b ldr r3, [r3, #0] 800148e: 681a ldr r2, [r3, #0] 8001490: 687b ldr r3, [r7, #4] 8001492: 681b ldr r3, [r3, #0] 8001494: f022 020e bic.w r2, r2, #14 8001498: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); 800149a: 687b ldr r3, [r7, #4] 800149c: 681b ldr r3, [r3, #0] 800149e: 681a ldr r2, [r3, #0] 80014a0: 687b ldr r3, [r7, #4] 80014a2: 681b ldr r3, [r3, #0] 80014a4: f022 0201 bic.w r2, r2, #1 80014a8: 601a str r2, [r3, #0] hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask; } #else /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); 80014aa: 687b ldr r3, [r7, #4] 80014ac: 6c5b ldr r3, [r3, #68] ; 0x44 80014ae: f003 021c and.w r2, r3, #28 80014b2: 687b ldr r3, [r7, #4] 80014b4: 6c1b ldr r3, [r3, #64] ; 0x40 80014b6: 2101 movs r1, #1 80014b8: fa01 f202 lsl.w r2, r1, r2 80014bc: 605a str r2, [r3, #4] #endif /* DMAMUX1 */ /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; 80014be: 687b ldr r3, [r7, #4] 80014c0: 2201 movs r2, #1 80014c2: f883 2025 strb.w r2, [r3, #37] ; 0x25 /* Process Unlocked */ __HAL_UNLOCK(hdma); 80014c6: 687b ldr r3, [r7, #4] 80014c8: 2200 movs r2, #0 80014ca: f883 2024 strb.w r2, [r3, #36] ; 0x24 /* Call User Abort callback */ if (hdma->XferAbortCallback != NULL) 80014ce: 687b ldr r3, [r7, #4] 80014d0: 6b9b ldr r3, [r3, #56] ; 0x38 80014d2: 2b00 cmp r3, #0 80014d4: d003 beq.n 80014de { hdma->XferAbortCallback(hdma); 80014d6: 687b ldr r3, [r7, #4] 80014d8: 6b9b ldr r3, [r3, #56] ; 0x38 80014da: 6878 ldr r0, [r7, #4] 80014dc: 4798 blx r3 } } return status; 80014de: 7bfb ldrb r3, [r7, #15] } 80014e0: 4618 mov r0, r3 80014e2: 3710 adds r7, #16 80014e4: 46bd mov sp, r7 80014e6: bd80 pop {r7, pc} 080014e8 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80014e8: b480 push {r7} 80014ea: b087 sub sp, #28 80014ec: af00 add r7, sp, #0 80014ee: 6078 str r0, [r7, #4] 80014f0: 6039 str r1, [r7, #0] uint32_t position = 0x00u; 80014f2: 2300 movs r3, #0 80014f4: 617b str r3, [r7, #20] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0x00u) 80014f6: e154 b.n 80017a2 { /* Get current io position */ iocurrent = (GPIO_Init->Pin) & (1uL << position); 80014f8: 683b ldr r3, [r7, #0] 80014fa: 681a ldr r2, [r3, #0] 80014fc: 2101 movs r1, #1 80014fe: 697b ldr r3, [r7, #20] 8001500: fa01 f303 lsl.w r3, r1, r3 8001504: 4013 ands r3, r2 8001506: 60fb str r3, [r7, #12] if (iocurrent != 0x00u) 8001508: 68fb ldr r3, [r7, #12] 800150a: 2b00 cmp r3, #0 800150c: f000 8146 beq.w 800179c { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) 8001510: 683b ldr r3, [r7, #0] 8001512: 685b ldr r3, [r3, #4] 8001514: f003 0303 and.w r3, r3, #3 8001518: 2b01 cmp r3, #1 800151a: d005 beq.n 8001528 800151c: 683b ldr r3, [r7, #0] 800151e: 685b ldr r3, [r3, #4] 8001520: f003 0303 and.w r3, r3, #3 8001524: 2b02 cmp r3, #2 8001526: d130 bne.n 800158a { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 8001528: 687b ldr r3, [r7, #4] 800152a: 689b ldr r3, [r3, #8] 800152c: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDR_OSPEED0 << (position * 2u)); 800152e: 697b ldr r3, [r7, #20] 8001530: 005b lsls r3, r3, #1 8001532: 2203 movs r2, #3 8001534: fa02 f303 lsl.w r3, r2, r3 8001538: 43db mvns r3, r3 800153a: 693a ldr r2, [r7, #16] 800153c: 4013 ands r3, r2 800153e: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2u)); 8001540: 683b ldr r3, [r7, #0] 8001542: 68da ldr r2, [r3, #12] 8001544: 697b ldr r3, [r7, #20] 8001546: 005b lsls r3, r3, #1 8001548: fa02 f303 lsl.w r3, r2, r3 800154c: 693a ldr r2, [r7, #16] 800154e: 4313 orrs r3, r2 8001550: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; 8001552: 687b ldr r3, [r7, #4] 8001554: 693a ldr r2, [r7, #16] 8001556: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 8001558: 687b ldr r3, [r7, #4] 800155a: 685b ldr r3, [r3, #4] 800155c: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT0 << position) ; 800155e: 2201 movs r2, #1 8001560: 697b ldr r3, [r7, #20] 8001562: fa02 f303 lsl.w r3, r2, r3 8001566: 43db mvns r3, r3 8001568: 693a ldr r2, [r7, #16] 800156a: 4013 ands r3, r2 800156c: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 800156e: 683b ldr r3, [r7, #0] 8001570: 685b ldr r3, [r3, #4] 8001572: 091b lsrs r3, r3, #4 8001574: f003 0201 and.w r2, r3, #1 8001578: 697b ldr r3, [r7, #20] 800157a: fa02 f303 lsl.w r3, r2, r3 800157e: 693a ldr r2, [r7, #16] 8001580: 4313 orrs r3, r2 8001582: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; 8001584: 687b ldr r3, [r7, #4] 8001586: 693a ldr r2, [r7, #16] 8001588: 605a str r2, [r3, #4] } #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ /* Activate the Pull-up or Pull down resistor for the current IO */ if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 800158a: 683b ldr r3, [r7, #0] 800158c: 685b ldr r3, [r3, #4] 800158e: f003 0303 and.w r3, r3, #3 8001592: 2b03 cmp r3, #3 8001594: d017 beq.n 80015c6 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); temp = GPIOx->PUPDR; 8001596: 687b ldr r3, [r7, #4] 8001598: 68db ldr r3, [r3, #12] 800159a: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); 800159c: 697b ldr r3, [r7, #20] 800159e: 005b lsls r3, r3, #1 80015a0: 2203 movs r2, #3 80015a2: fa02 f303 lsl.w r3, r2, r3 80015a6: 43db mvns r3, r3 80015a8: 693a ldr r2, [r7, #16] 80015aa: 4013 ands r3, r2 80015ac: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2U)); 80015ae: 683b ldr r3, [r7, #0] 80015b0: 689a ldr r2, [r3, #8] 80015b2: 697b ldr r3, [r7, #20] 80015b4: 005b lsls r3, r3, #1 80015b6: fa02 f303 lsl.w r3, r2, r3 80015ba: 693a ldr r2, [r7, #16] 80015bc: 4313 orrs r3, r2 80015be: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; 80015c0: 687b ldr r3, [r7, #4] 80015c2: 693a ldr r2, [r7, #16] 80015c4: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80015c6: 683b ldr r3, [r7, #0] 80015c8: 685b ldr r3, [r3, #4] 80015ca: f003 0303 and.w r3, r3, #3 80015ce: 2b02 cmp r3, #2 80015d0: d123 bne.n 800161a /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3u]; 80015d2: 697b ldr r3, [r7, #20] 80015d4: 08da lsrs r2, r3, #3 80015d6: 687b ldr r3, [r7, #4] 80015d8: 3208 adds r2, #8 80015da: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80015de: 613b str r3, [r7, #16] temp &= ~(0xFu << ((position & 0x07u) * 4u)); 80015e0: 697b ldr r3, [r7, #20] 80015e2: f003 0307 and.w r3, r3, #7 80015e6: 009b lsls r3, r3, #2 80015e8: 220f movs r2, #15 80015ea: fa02 f303 lsl.w r3, r2, r3 80015ee: 43db mvns r3, r3 80015f0: 693a ldr r2, [r7, #16] 80015f2: 4013 ands r3, r2 80015f4: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); 80015f6: 683b ldr r3, [r7, #0] 80015f8: 691a ldr r2, [r3, #16] 80015fa: 697b ldr r3, [r7, #20] 80015fc: f003 0307 and.w r3, r3, #7 8001600: 009b lsls r3, r3, #2 8001602: fa02 f303 lsl.w r3, r2, r3 8001606: 693a ldr r2, [r7, #16] 8001608: 4313 orrs r3, r2 800160a: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3u] = temp; 800160c: 697b ldr r3, [r7, #20] 800160e: 08da lsrs r2, r3, #3 8001610: 687b ldr r3, [r7, #4] 8001612: 3208 adds r2, #8 8001614: 6939 ldr r1, [r7, #16] 8001616: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 800161a: 687b ldr r3, [r7, #4] 800161c: 681b ldr r3, [r3, #0] 800161e: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); 8001620: 697b ldr r3, [r7, #20] 8001622: 005b lsls r3, r3, #1 8001624: 2203 movs r2, #3 8001626: fa02 f303 lsl.w r3, r2, r3 800162a: 43db mvns r3, r3 800162c: 693a ldr r2, [r7, #16] 800162e: 4013 ands r3, r2 8001630: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); 8001632: 683b ldr r3, [r7, #0] 8001634: 685b ldr r3, [r3, #4] 8001636: f003 0203 and.w r2, r3, #3 800163a: 697b ldr r3, [r7, #20] 800163c: 005b lsls r3, r3, #1 800163e: fa02 f303 lsl.w r3, r2, r3 8001642: 693a ldr r2, [r7, #16] 8001644: 4313 orrs r3, r2 8001646: 613b str r3, [r7, #16] GPIOx->MODER = temp; 8001648: 687b ldr r3, [r7, #4] 800164a: 693a ldr r2, [r7, #16] 800164c: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) 800164e: 683b ldr r3, [r7, #0] 8001650: 685b ldr r3, [r3, #4] 8001652: f403 3340 and.w r3, r3, #196608 ; 0x30000 8001656: 2b00 cmp r3, #0 8001658: f000 80a0 beq.w 800179c { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 800165c: 4b58 ldr r3, [pc, #352] ; (80017c0 ) 800165e: 6e1b ldr r3, [r3, #96] ; 0x60 8001660: 4a57 ldr r2, [pc, #348] ; (80017c0 ) 8001662: f043 0301 orr.w r3, r3, #1 8001666: 6613 str r3, [r2, #96] ; 0x60 8001668: 4b55 ldr r3, [pc, #340] ; (80017c0 ) 800166a: 6e1b ldr r3, [r3, #96] ; 0x60 800166c: f003 0301 and.w r3, r3, #1 8001670: 60bb str r3, [r7, #8] 8001672: 68bb ldr r3, [r7, #8] temp = SYSCFG->EXTICR[position >> 2u]; 8001674: 4a53 ldr r2, [pc, #332] ; (80017c4 ) 8001676: 697b ldr r3, [r7, #20] 8001678: 089b lsrs r3, r3, #2 800167a: 3302 adds r3, #2 800167c: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8001680: 613b str r3, [r7, #16] temp &= ~(0x0FuL << (4u * (position & 0x03u))); 8001682: 697b ldr r3, [r7, #20] 8001684: f003 0303 and.w r3, r3, #3 8001688: 009b lsls r3, r3, #2 800168a: 220f movs r2, #15 800168c: fa02 f303 lsl.w r3, r2, r3 8001690: 43db mvns r3, r3 8001692: 693a ldr r2, [r7, #16] 8001694: 4013 ands r3, r2 8001696: 613b str r3, [r7, #16] temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); 8001698: 687b ldr r3, [r7, #4] 800169a: f1b3 4f90 cmp.w r3, #1207959552 ; 0x48000000 800169e: d019 beq.n 80016d4 80016a0: 687b ldr r3, [r7, #4] 80016a2: 4a49 ldr r2, [pc, #292] ; (80017c8 ) 80016a4: 4293 cmp r3, r2 80016a6: d013 beq.n 80016d0 80016a8: 687b ldr r3, [r7, #4] 80016aa: 4a48 ldr r2, [pc, #288] ; (80017cc ) 80016ac: 4293 cmp r3, r2 80016ae: d00d beq.n 80016cc 80016b0: 687b ldr r3, [r7, #4] 80016b2: 4a47 ldr r2, [pc, #284] ; (80017d0 ) 80016b4: 4293 cmp r3, r2 80016b6: d007 beq.n 80016c8 80016b8: 687b ldr r3, [r7, #4] 80016ba: 4a46 ldr r2, [pc, #280] ; (80017d4 ) 80016bc: 4293 cmp r3, r2 80016be: d101 bne.n 80016c4 80016c0: 2304 movs r3, #4 80016c2: e008 b.n 80016d6 80016c4: 2307 movs r3, #7 80016c6: e006 b.n 80016d6 80016c8: 2303 movs r3, #3 80016ca: e004 b.n 80016d6 80016cc: 2302 movs r3, #2 80016ce: e002 b.n 80016d6 80016d0: 2301 movs r3, #1 80016d2: e000 b.n 80016d6 80016d4: 2300 movs r3, #0 80016d6: 697a ldr r2, [r7, #20] 80016d8: f002 0203 and.w r2, r2, #3 80016dc: 0092 lsls r2, r2, #2 80016de: 4093 lsls r3, r2 80016e0: 693a ldr r2, [r7, #16] 80016e2: 4313 orrs r3, r2 80016e4: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2u] = temp; 80016e6: 4937 ldr r1, [pc, #220] ; (80017c4 ) 80016e8: 697b ldr r3, [r7, #20] 80016ea: 089b lsrs r3, r3, #2 80016ec: 3302 adds r3, #2 80016ee: 693a ldr r2, [r7, #16] 80016f0: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; 80016f4: 4b38 ldr r3, [pc, #224] ; (80017d8 ) 80016f6: 689b ldr r3, [r3, #8] 80016f8: 613b str r3, [r7, #16] temp &= ~(iocurrent); 80016fa: 68fb ldr r3, [r7, #12] 80016fc: 43db mvns r3, r3 80016fe: 693a ldr r2, [r7, #16] 8001700: 4013 ands r3, r2 8001702: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) 8001704: 683b ldr r3, [r7, #0] 8001706: 685b ldr r3, [r3, #4] 8001708: f403 1380 and.w r3, r3, #1048576 ; 0x100000 800170c: 2b00 cmp r3, #0 800170e: d003 beq.n 8001718 { temp |= iocurrent; 8001710: 693a ldr r2, [r7, #16] 8001712: 68fb ldr r3, [r7, #12] 8001714: 4313 orrs r3, r2 8001716: 613b str r3, [r7, #16] } EXTI->RTSR1 = temp; 8001718: 4a2f ldr r2, [pc, #188] ; (80017d8 ) 800171a: 693b ldr r3, [r7, #16] 800171c: 6093 str r3, [r2, #8] temp = EXTI->FTSR1; 800171e: 4b2e ldr r3, [pc, #184] ; (80017d8 ) 8001720: 68db ldr r3, [r3, #12] 8001722: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8001724: 68fb ldr r3, [r7, #12] 8001726: 43db mvns r3, r3 8001728: 693a ldr r2, [r7, #16] 800172a: 4013 ands r3, r2 800172c: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) 800172e: 683b ldr r3, [r7, #0] 8001730: 685b ldr r3, [r3, #4] 8001732: f403 1300 and.w r3, r3, #2097152 ; 0x200000 8001736: 2b00 cmp r3, #0 8001738: d003 beq.n 8001742 { temp |= iocurrent; 800173a: 693a ldr r2, [r7, #16] 800173c: 68fb ldr r3, [r7, #12] 800173e: 4313 orrs r3, r2 8001740: 613b str r3, [r7, #16] } EXTI->FTSR1 = temp; 8001742: 4a25 ldr r2, [pc, #148] ; (80017d8 ) 8001744: 693b ldr r3, [r7, #16] 8001746: 60d3 str r3, [r2, #12] /* Clear EXTI line configuration */ temp = EXTI->EMR1; 8001748: 4b23 ldr r3, [pc, #140] ; (80017d8 ) 800174a: 685b ldr r3, [r3, #4] 800174c: 613b str r3, [r7, #16] temp &= ~(iocurrent); 800174e: 68fb ldr r3, [r7, #12] 8001750: 43db mvns r3, r3 8001752: 693a ldr r2, [r7, #16] 8001754: 4013 ands r3, r2 8001756: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00u) 8001758: 683b ldr r3, [r7, #0] 800175a: 685b ldr r3, [r3, #4] 800175c: f403 3300 and.w r3, r3, #131072 ; 0x20000 8001760: 2b00 cmp r3, #0 8001762: d003 beq.n 800176c { temp |= iocurrent; 8001764: 693a ldr r2, [r7, #16] 8001766: 68fb ldr r3, [r7, #12] 8001768: 4313 orrs r3, r2 800176a: 613b str r3, [r7, #16] } EXTI->EMR1 = temp; 800176c: 4a1a ldr r2, [pc, #104] ; (80017d8 ) 800176e: 693b ldr r3, [r7, #16] 8001770: 6053 str r3, [r2, #4] temp = EXTI->IMR1; 8001772: 4b19 ldr r3, [pc, #100] ; (80017d8 ) 8001774: 681b ldr r3, [r3, #0] 8001776: 613b str r3, [r7, #16] temp &= ~(iocurrent); 8001778: 68fb ldr r3, [r7, #12] 800177a: 43db mvns r3, r3 800177c: 693a ldr r2, [r7, #16] 800177e: 4013 ands r3, r2 8001780: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00u) 8001782: 683b ldr r3, [r7, #0] 8001784: 685b ldr r3, [r3, #4] 8001786: f403 3380 and.w r3, r3, #65536 ; 0x10000 800178a: 2b00 cmp r3, #0 800178c: d003 beq.n 8001796 { temp |= iocurrent; 800178e: 693a ldr r2, [r7, #16] 8001790: 68fb ldr r3, [r7, #12] 8001792: 4313 orrs r3, r2 8001794: 613b str r3, [r7, #16] } EXTI->IMR1 = temp; 8001796: 4a10 ldr r2, [pc, #64] ; (80017d8 ) 8001798: 693b ldr r3, [r7, #16] 800179a: 6013 str r3, [r2, #0] } } position++; 800179c: 697b ldr r3, [r7, #20] 800179e: 3301 adds r3, #1 80017a0: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0x00u) 80017a2: 683b ldr r3, [r7, #0] 80017a4: 681a ldr r2, [r3, #0] 80017a6: 697b ldr r3, [r7, #20] 80017a8: fa22 f303 lsr.w r3, r2, r3 80017ac: 2b00 cmp r3, #0 80017ae: f47f aea3 bne.w 80014f8 } } 80017b2: bf00 nop 80017b4: bf00 nop 80017b6: 371c adds r7, #28 80017b8: 46bd mov sp, r7 80017ba: f85d 7b04 ldr.w r7, [sp], #4 80017be: 4770 bx lr 80017c0: 40021000 .word 0x40021000 80017c4: 40010000 .word 0x40010000 80017c8: 48000400 .word 0x48000400 80017cc: 48000800 .word 0x48000800 80017d0: 48000c00 .word 0x48000c00 80017d4: 48001000 .word 0x48001000 80017d8: 40010400 .word 0x40010400 080017dc : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 80017dc: b480 push {r7} 80017de: b083 sub sp, #12 80017e0: af00 add r7, sp, #0 80017e2: 6078 str r0, [r7, #4] 80017e4: 460b mov r3, r1 80017e6: 807b strh r3, [r7, #2] 80017e8: 4613 mov r3, r2 80017ea: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) 80017ec: 787b ldrb r3, [r7, #1] 80017ee: 2b00 cmp r3, #0 80017f0: d003 beq.n 80017fa { GPIOx->BSRR = (uint32_t)GPIO_Pin; 80017f2: 887a ldrh r2, [r7, #2] 80017f4: 687b ldr r3, [r7, #4] 80017f6: 619a str r2, [r3, #24] } else { GPIOx->BRR = (uint32_t)GPIO_Pin; } } 80017f8: e002 b.n 8001800 GPIOx->BRR = (uint32_t)GPIO_Pin; 80017fa: 887a ldrh r2, [r7, #2] 80017fc: 687b ldr r3, [r7, #4] 80017fe: 629a str r2, [r3, #40] ; 0x28 } 8001800: bf00 nop 8001802: 370c adds r7, #12 8001804: 46bd mov sp, r7 8001806: f85d 7b04 ldr.w r7, [sp], #4 800180a: 4770 bx lr 0800180c : * @brief Return Voltage Scaling Range. * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1 or PWR_REGULATOR_VOLTAGE_SCALE2 * or PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when applicable) */ uint32_t HAL_PWREx_GetVoltageRange(void) { 800180c: b480 push {r7} 800180e: af00 add r7, sp, #0 else { return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST; } #else return (PWR->CR1 & PWR_CR1_VOS); 8001810: 4b04 ldr r3, [pc, #16] ; (8001824 ) 8001812: 681b ldr r3, [r3, #0] 8001814: f403 63c0 and.w r3, r3, #1536 ; 0x600 #endif } 8001818: 4618 mov r0, r3 800181a: 46bd mov sp, r7 800181c: f85d 7b04 ldr.w r7, [sp], #4 8001820: 4770 bx lr 8001822: bf00 nop 8001824: 40007000 .word 0x40007000 08001828 : * cleared before returning the status. If the flag is not cleared within * 50 microseconds, HAL_TIMEOUT status is reported. * @retval HAL Status */ HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) { 8001828: b480 push {r7} 800182a: b085 sub sp, #20 800182c: af00 add r7, sp, #0 800182e: 6078 str r0, [r7, #4] } #else /* If Set Range 1 */ if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1) 8001830: 687b ldr r3, [r7, #4] 8001832: f5b3 7f00 cmp.w r3, #512 ; 0x200 8001836: d130 bne.n 800189a { if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE1) 8001838: 4b23 ldr r3, [pc, #140] ; (80018c8 ) 800183a: 681b ldr r3, [r3, #0] 800183c: f403 63c0 and.w r3, r3, #1536 ; 0x600 8001840: f5b3 7f00 cmp.w r3, #512 ; 0x200 8001844: d038 beq.n 80018b8 { /* Set Range 1 */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1); 8001846: 4b20 ldr r3, [pc, #128] ; (80018c8 ) 8001848: 681b ldr r3, [r3, #0] 800184a: f423 63c0 bic.w r3, r3, #1536 ; 0x600 800184e: 4a1e ldr r2, [pc, #120] ; (80018c8 ) 8001850: f443 7300 orr.w r3, r3, #512 ; 0x200 8001854: 6013 str r3, [r2, #0] /* Wait until VOSF is cleared */ wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U; 8001856: 4b1d ldr r3, [pc, #116] ; (80018cc ) 8001858: 681b ldr r3, [r3, #0] 800185a: 2232 movs r2, #50 ; 0x32 800185c: fb02 f303 mul.w r3, r2, r3 8001860: 4a1b ldr r2, [pc, #108] ; (80018d0 ) 8001862: fba2 2303 umull r2, r3, r2, r3 8001866: 0c9b lsrs r3, r3, #18 8001868: 3301 adds r3, #1 800186a: 60fb str r3, [r7, #12] while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 800186c: e002 b.n 8001874 { wait_loop_index--; 800186e: 68fb ldr r3, [r7, #12] 8001870: 3b01 subs r3, #1 8001872: 60fb str r3, [r7, #12] while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U)) 8001874: 4b14 ldr r3, [pc, #80] ; (80018c8 ) 8001876: 695b ldr r3, [r3, #20] 8001878: f403 6380 and.w r3, r3, #1024 ; 0x400 800187c: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8001880: d102 bne.n 8001888 8001882: 68fb ldr r3, [r7, #12] 8001884: 2b00 cmp r3, #0 8001886: d1f2 bne.n 800186e } if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) 8001888: 4b0f ldr r3, [pc, #60] ; (80018c8 ) 800188a: 695b ldr r3, [r3, #20] 800188c: f403 6380 and.w r3, r3, #1024 ; 0x400 8001890: f5b3 6f80 cmp.w r3, #1024 ; 0x400 8001894: d110 bne.n 80018b8 { return HAL_TIMEOUT; 8001896: 2303 movs r3, #3 8001898: e00f b.n 80018ba } } } else { if (READ_BIT(PWR->CR1, PWR_CR1_VOS) != PWR_REGULATOR_VOLTAGE_SCALE2) 800189a: 4b0b ldr r3, [pc, #44] ; (80018c8 ) 800189c: 681b ldr r3, [r3, #0] 800189e: f403 63c0 and.w r3, r3, #1536 ; 0x600 80018a2: f5b3 6f80 cmp.w r3, #1024 ; 0x400 80018a6: d007 beq.n 80018b8 { /* Set Range 2 */ MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2); 80018a8: 4b07 ldr r3, [pc, #28] ; (80018c8 ) 80018aa: 681b ldr r3, [r3, #0] 80018ac: f423 63c0 bic.w r3, r3, #1536 ; 0x600 80018b0: 4a05 ldr r2, [pc, #20] ; (80018c8 ) 80018b2: f443 6380 orr.w r3, r3, #1024 ; 0x400 80018b6: 6013 str r3, [r2, #0] /* No need to wait for VOSF to be cleared for this transition */ } } #endif return HAL_OK; 80018b8: 2300 movs r3, #0 } 80018ba: 4618 mov r0, r3 80018bc: 3714 adds r7, #20 80018be: 46bd mov sp, r7 80018c0: f85d 7b04 ldr.w r7, [sp], #4 80018c4: 4770 bx lr 80018c6: bf00 nop 80018c8: 40007000 .word 0x40007000 80018cc: 20000004 .word 0x20000004 80018d0: 431bde83 .word 0x431bde83 080018d4 : * @note If HSE failed to start, HSE should be disabled before recalling HAL_RCC_OscConfig(). * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { 80018d4: b580 push {r7, lr} 80018d6: b088 sub sp, #32 80018d8: af00 add r7, sp, #0 80018da: 6078 str r0, [r7, #4] uint32_t tickstart; HAL_StatusTypeDef status; uint32_t sysclk_source, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) 80018dc: 687b ldr r3, [r7, #4] 80018de: 2b00 cmp r3, #0 80018e0: d102 bne.n 80018e8 { return HAL_ERROR; 80018e2: 2301 movs r3, #1 80018e4: f000 bc02 b.w 80020ec } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE(); 80018e8: 4b96 ldr r3, [pc, #600] ; (8001b44 ) 80018ea: 689b ldr r3, [r3, #8] 80018ec: f003 030c and.w r3, r3, #12 80018f0: 61bb str r3, [r7, #24] pll_config = __HAL_RCC_GET_PLL_OSCSOURCE(); 80018f2: 4b94 ldr r3, [pc, #592] ; (8001b44 ) 80018f4: 68db ldr r3, [r3, #12] 80018f6: f003 0303 and.w r3, r3, #3 80018fa: 617b str r3, [r7, #20] /*----------------------------- MSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) 80018fc: 687b ldr r3, [r7, #4] 80018fe: 681b ldr r3, [r3, #0] 8001900: f003 0310 and.w r3, r3, #16 8001904: 2b00 cmp r3, #0 8001906: f000 80e4 beq.w 8001ad2 assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Check if MSI is used as system clock or as PLL source when PLL is selected as system clock */ if((sysclk_source == RCC_CFGR_SWS_MSI) || 800190a: 69bb ldr r3, [r7, #24] 800190c: 2b00 cmp r3, #0 800190e: d007 beq.n 8001920 8001910: 69bb ldr r3, [r7, #24] 8001912: 2b0c cmp r3, #12 8001914: f040 808b bne.w 8001a2e ((sysclk_source == RCC_CFGR_SWS_PLL) && (pll_config == RCC_PLLSOURCE_MSI))) 8001918: 697b ldr r3, [r7, #20] 800191a: 2b01 cmp r3, #1 800191c: f040 8087 bne.w 8001a2e { if((READ_BIT(RCC->CR, RCC_CR_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) 8001920: 4b88 ldr r3, [pc, #544] ; (8001b44 ) 8001922: 681b ldr r3, [r3, #0] 8001924: f003 0302 and.w r3, r3, #2 8001928: 2b00 cmp r3, #0 800192a: d005 beq.n 8001938 800192c: 687b ldr r3, [r7, #4] 800192e: 699b ldr r3, [r3, #24] 8001930: 2b00 cmp r3, #0 8001932: d101 bne.n 8001938 { return HAL_ERROR; 8001934: 2301 movs r3, #1 8001936: e3d9 b.n 80020ec else { /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ if(RCC_OscInitStruct->MSIClockRange > __HAL_RCC_GET_MSI_RANGE()) 8001938: 687b ldr r3, [r7, #4] 800193a: 6a1a ldr r2, [r3, #32] 800193c: 4b81 ldr r3, [pc, #516] ; (8001b44 ) 800193e: 681b ldr r3, [r3, #0] 8001940: f003 0308 and.w r3, r3, #8 8001944: 2b00 cmp r3, #0 8001946: d004 beq.n 8001952 8001948: 4b7e ldr r3, [pc, #504] ; (8001b44 ) 800194a: 681b ldr r3, [r3, #0] 800194c: f003 03f0 and.w r3, r3, #240 ; 0xf0 8001950: e005 b.n 800195e 8001952: 4b7c ldr r3, [pc, #496] ; (8001b44 ) 8001954: f8d3 3094 ldr.w r3, [r3, #148] ; 0x94 8001958: 091b lsrs r3, r3, #4 800195a: f003 03f0 and.w r3, r3, #240 ; 0xf0 800195e: 4293 cmp r3, r2 8001960: d223 bcs.n 80019aa { /* First increase number of wait states update if necessary */ if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) 8001962: 687b ldr r3, [r7, #4] 8001964: 6a1b ldr r3, [r3, #32] 8001966: 4618 mov r0, r3 8001968: f000 fd8c bl 8002484 800196c: 4603 mov r3, r0 800196e: 2b00 cmp r3, #0 8001970: d001 beq.n 8001976 { return HAL_ERROR; 8001972: 2301 movs r3, #1 8001974: e3ba b.n 80020ec } /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); 8001976: 4b73 ldr r3, [pc, #460] ; (8001b44 ) 8001978: 681b ldr r3, [r3, #0] 800197a: 4a72 ldr r2, [pc, #456] ; (8001b44 ) 800197c: f043 0308 orr.w r3, r3, #8 8001980: 6013 str r3, [r2, #0] 8001982: 4b70 ldr r3, [pc, #448] ; (8001b44 ) 8001984: 681b ldr r3, [r3, #0] 8001986: f023 02f0 bic.w r2, r3, #240 ; 0xf0 800198a: 687b ldr r3, [r7, #4] 800198c: 6a1b ldr r3, [r3, #32] 800198e: 496d ldr r1, [pc, #436] ; (8001b44 ) 8001990: 4313 orrs r3, r2 8001992: 600b str r3, [r1, #0] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); 8001994: 4b6b ldr r3, [pc, #428] ; (8001b44 ) 8001996: 685b ldr r3, [r3, #4] 8001998: f423 427f bic.w r2, r3, #65280 ; 0xff00 800199c: 687b ldr r3, [r7, #4] 800199e: 69db ldr r3, [r3, #28] 80019a0: 021b lsls r3, r3, #8 80019a2: 4968 ldr r1, [pc, #416] ; (8001b44 ) 80019a4: 4313 orrs r3, r2 80019a6: 604b str r3, [r1, #4] 80019a8: e025 b.n 80019f6 } else { /* Else, keep current flash latency while decreasing applies */ /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); 80019aa: 4b66 ldr r3, [pc, #408] ; (8001b44 ) 80019ac: 681b ldr r3, [r3, #0] 80019ae: 4a65 ldr r2, [pc, #404] ; (8001b44 ) 80019b0: f043 0308 orr.w r3, r3, #8 80019b4: 6013 str r3, [r2, #0] 80019b6: 4b63 ldr r3, [pc, #396] ; (8001b44 ) 80019b8: 681b ldr r3, [r3, #0] 80019ba: f023 02f0 bic.w r2, r3, #240 ; 0xf0 80019be: 687b ldr r3, [r7, #4] 80019c0: 6a1b ldr r3, [r3, #32] 80019c2: 4960 ldr r1, [pc, #384] ; (8001b44 ) 80019c4: 4313 orrs r3, r2 80019c6: 600b str r3, [r1, #0] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); 80019c8: 4b5e ldr r3, [pc, #376] ; (8001b44 ) 80019ca: 685b ldr r3, [r3, #4] 80019cc: f423 427f bic.w r2, r3, #65280 ; 0xff00 80019d0: 687b ldr r3, [r7, #4] 80019d2: 69db ldr r3, [r3, #28] 80019d4: 021b lsls r3, r3, #8 80019d6: 495b ldr r1, [pc, #364] ; (8001b44 ) 80019d8: 4313 orrs r3, r2 80019da: 604b str r3, [r1, #4] /* Decrease number of wait states update if necessary */ /* Only possible when MSI is the System clock source */ if(sysclk_source == RCC_CFGR_SWS_MSI) 80019dc: 69bb ldr r3, [r7, #24] 80019de: 2b00 cmp r3, #0 80019e0: d109 bne.n 80019f6 { if(RCC_SetFlashLatencyFromMSIRange(RCC_OscInitStruct->MSIClockRange) != HAL_OK) 80019e2: 687b ldr r3, [r7, #4] 80019e4: 6a1b ldr r3, [r3, #32] 80019e6: 4618 mov r0, r3 80019e8: f000 fd4c bl 8002484 80019ec: 4603 mov r3, r0 80019ee: 2b00 cmp r3, #0 80019f0: d001 beq.n 80019f6 { return HAL_ERROR; 80019f2: 2301 movs r3, #1 80019f4: e37a b.n 80020ec } } } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> (AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos] & 0x1FU); 80019f6: f000 fc81 bl 80022fc