From 7eb9f7abcf3f31dba954945adf1f9119df8ff580 Mon Sep 17 00:00:00 2001 From: Ben Pig Chu Date: Tue, 18 Dec 2018 15:16:30 +0800 Subject: [PATCH] maually remove warning, pt4 --- kernel/build.rs | 1 + kernel/src/arch/riscv32/compiler_rt.c | 2 +- kernel/src/arch/riscv32/consts.rs | 2 ++ kernel/src/arch/riscv32/context.rs | 4 ++-- kernel/src/arch/riscv32/cpu.rs | 1 - kernel/src/arch/riscv32/interrupt.rs | 1 - kernel/src/arch/riscv32/io.rs | 1 + kernel/src/arch/riscv32/memory.rs | 5 +++-- kernel/src/arch/riscv32/mod.rs | 2 +- kernel/src/arch/riscv32/paging.rs | 8 +++----- 10 files changed, 14 insertions(+), 13 deletions(-) diff --git a/kernel/build.rs b/kernel/build.rs index 73117d7..3a8a541 100644 --- a/kernel/build.rs +++ b/kernel/build.rs @@ -22,6 +22,7 @@ fn main() { .file("src/arch/riscv32/compiler_rt.c") .flag("-march=rv32ia") .flag("-mabi=ilp32") + .flag("-Wno-builtin-declaration-mismatch") .compile("atomic_rt"); if let Ok(file_path) = gen_sfsimg_asm() { cc::Build::new() diff --git a/kernel/src/arch/riscv32/compiler_rt.c b/kernel/src/arch/riscv32/compiler_rt.c index 95c871f..1a22db7 100644 --- a/kernel/src/arch/riscv32/compiler_rt.c +++ b/kernel/src/arch/riscv32/compiler_rt.c @@ -6,7 +6,7 @@ int __atomic_load_4(int *src) { return res; } -int __atomic_store_4(int *dst, int val) { +void __atomic_store_4(int *dst, int val) { __asm__ __volatile__("amoswap.w.aq zero, %0, (%1)" :: "r"(val), "r"(dst) : "memory"); } diff --git a/kernel/src/arch/riscv32/consts.rs b/kernel/src/arch/riscv32/consts.rs index 40a8e6b..fb534f8 100644 --- a/kernel/src/arch/riscv32/consts.rs +++ b/kernel/src/arch/riscv32/consts.rs @@ -1,6 +1,8 @@ // Physical address available on THINPAD: // [0x80000000, 0x80800000] +#[allow(dead_code)] const P2_SIZE: usize = 1 << 22; +#[allow(dead_code)] const P2_MASK: usize = 0x3ff << 22; pub const RECURSIVE_INDEX: usize = 0x3fe; pub const KERNEL_OFFSET: usize = 0; diff --git a/kernel/src/arch/riscv32/context.rs b/kernel/src/arch/riscv32/context.rs index 11c657b..2c92a3e 100644 --- a/kernel/src/arch/riscv32/context.rs +++ b/kernel/src/arch/riscv32/context.rs @@ -155,7 +155,7 @@ impl Context { /// Pop all callee-saved registers, then return to the target. #[naked] #[inline(never)] - pub unsafe extern fn switch(&mut self, target: &mut Self) { + pub unsafe extern fn switch(&mut self, _target: &mut Self) { asm!( " // save from's registers @@ -241,7 +241,7 @@ impl Context { * @retval: * a Context struct with the pointer to the kernel stack top - 1 as its only element */ - pub unsafe fn new_user_thread(entry_addr: usize, ustack_top: usize, kstack_top: usize, is32: bool, cr3: usize) -> Self { + pub unsafe fn new_user_thread(entry_addr: usize, ustack_top: usize, kstack_top: usize, _is32: bool, cr3: usize) -> Self { InitStack { context: ContextData::new(cr3), tf: TrapFrame::new_user_thread(entry_addr, ustack_top), diff --git a/kernel/src/arch/riscv32/cpu.rs b/kernel/src/arch/riscv32/cpu.rs index 0f21646..74c04be 100644 --- a/kernel/src/arch/riscv32/cpu.rs +++ b/kernel/src/arch/riscv32/cpu.rs @@ -1,6 +1,5 @@ use crate::consts::MAX_CPU_NUM; use core::ptr::{read_volatile, write_volatile}; -use crate::memory::*; static mut STARTED: [bool; MAX_CPU_NUM] = [false; MAX_CPU_NUM]; diff --git a/kernel/src/arch/riscv32/interrupt.rs b/kernel/src/arch/riscv32/interrupt.rs index 22a3674..218808b 100644 --- a/kernel/src/arch/riscv32/interrupt.rs +++ b/kernel/src/arch/riscv32/interrupt.rs @@ -12,7 +12,6 @@ use riscv::register::{ }; use riscv::register::{mcause, mepc, sie}; pub use self::context::*; -use crate::memory::{MemorySet, InactivePageTable0}; use log::*; #[path = "context.rs"] diff --git a/kernel/src/arch/riscv32/io.rs b/kernel/src/arch/riscv32/io.rs index b2c49d2..60135fd 100644 --- a/kernel/src/arch/riscv32/io.rs +++ b/kernel/src/arch/riscv32/io.rs @@ -56,5 +56,6 @@ pub fn putfmt(fmt: Arguments) { const DATA: *mut u8 = 0x10000000 as *mut u8; const STATUS: *const u8 = 0x10000005 as *const u8; +#[allow(dead_code)] const CAN_READ: u8 = 1 << 0; const CAN_WRITE: u8 = 1 << 5; diff --git a/kernel/src/arch/riscv32/memory.rs b/kernel/src/arch/riscv32/memory.rs index f633ac2..07f52e4 100644 --- a/kernel/src/arch/riscv32/memory.rs +++ b/kernel/src/arch/riscv32/memory.rs @@ -1,8 +1,8 @@ -use core::{slice, mem}; +use core::mem; use riscv::{addr::*, register::sstatus}; use ucore_memory::PAGE_SIZE; use log::*; -use crate::memory::{active_table, FRAME_ALLOCATOR, init_heap, MemoryArea, MemoryAttr, MemorySet, MEMORY_ALLOCATOR, Linear}; +use crate::memory::{FRAME_ALLOCATOR, init_heap, MemoryAttr, MemorySet, Linear}; use crate::consts::{MEMORY_OFFSET, MEMORY_END}; #[cfg(feature = "no_mmu")] @@ -94,6 +94,7 @@ fn remap_the_kernel() { static mut SATP: usize = 0; // Symbols provided by linker script +#[allow(dead_code)] extern { fn stext(); fn etext(); diff --git a/kernel/src/arch/riscv32/mod.rs b/kernel/src/arch/riscv32/mod.rs index eb2a17a..dd919d8 100644 --- a/kernel/src/arch/riscv32/mod.rs +++ b/kernel/src/arch/riscv32/mod.rs @@ -16,7 +16,7 @@ pub extern fn rust_main(hartid: usize, dtb: usize, hart_mask: usize, functions: if hartid != 0 { while unsafe { !cpu::has_started(hartid) } { } others_main(); - unreachable!(); + //other_main -> ! } crate::logging::init(); diff --git a/kernel/src/arch/riscv32/paging.rs b/kernel/src/arch/riscv32/paging.rs index 0d86c29..15bb281 100644 --- a/kernel/src/arch/riscv32/paging.rs +++ b/kernel/src/arch/riscv32/paging.rs @@ -6,8 +6,6 @@ use riscv::asm::{sfence_vma, sfence_vma_all}; use riscv::paging::{Mapper, PageTable as RvPageTable, PageTableEntry, PageTableFlags as EF, RecursivePageTable}; use riscv::paging::{FrameAllocator, FrameDeallocator}; use riscv::register::satp; -use ucore_memory::memory_set::*; -use ucore_memory::PAGE_SIZE; use ucore_memory::paging::*; use log::*; @@ -26,7 +24,7 @@ pub fn setup_page_table(frame: Frame) { // Set kernel identity map // 0x10000000 ~ 1K area p2.map_identity(0x40, EF::VALID | EF::READABLE | EF::WRITABLE); - // 0x80000000 ~ 12M area + // 0x80000000 ~ 12M area p2.map_identity(KERNEL_P2_INDEX, EF::VALID | EF::READABLE | EF::WRITABLE | EF::EXECUTABLE); p2.map_identity(KERNEL_P2_INDEX + 1, EF::VALID | EF::READABLE | EF::WRITABLE | EF::EXECUTABLE); p2.map_identity(KERNEL_P2_INDEX + 2, EF::VALID | EF::READABLE | EF::WRITABLE | EF::EXECUTABLE); @@ -71,7 +69,7 @@ impl PageTable for ActivePageTable { */ fn unmap(&mut self, addr: usize) { let page = Page::of_addr(VirtAddr::new(addr)); - let (frame, flush) = self.0.unmap(page).unwrap(); + let (_, flush) = self.0.unmap(page).unwrap(); flush.flush(); } @@ -154,7 +152,7 @@ impl Entry for PageEntry { fn execute(&self) -> bool { self.0.flags().contains(EF::EXECUTABLE) } fn set_execute(&mut self, value: bool) { self.0.flags_mut().set(EF::EXECUTABLE, value); } fn mmio(&self) -> bool { false } - fn set_mmio(&mut self, value: bool) { } + fn set_mmio(&mut self, _value: bool) { } } #[derive(Debug)]