diff --git a/kernel/run-qemu-script-custom-llc b/kernel/run-qemu-script-custom-llc
index 28d6236..1f6e14a 100755
--- a/kernel/run-qemu-script-custom-llc
+++ b/kernel/run-qemu-script-custom-llc
@@ -6,8 +6,8 @@
 #   Just run
 #   $ ./run-qemu-script-custom-llc
 #
-# By default riscv32 is built. To build for riscv64,
-#		set the environment variable `RV64` to "1"
+# By default riscv64 is built. To build for riscv32,
+#		set the environment variable `RV32` to "1"
 set -e
 
 if ! [[ -d outdir ]]
@@ -17,10 +17,10 @@ then
   exit 1
 fi
 
-if [[ ${RV64} = 1 ]]; then
+if ! [[ ${RV32} = 1 ]]; then
 	TARGET_ARCH=riscv64
-	LOG=info
-	COMPILER_RT_CFLAGS="-march=rv64ia -mabi=lp64 -DTARGET_IS_64BITS -O3"
+	export LOG=info
+	COMPILER_RT_CFLAGS="-march=rv64ia -mabi=lp64 -O3"
 	SFSIMG_CFLAGS="-march=rv64ia -mabi=lp64"
 	RISCV_PK_CONFIGURE_FLAGS="--with-arch=rv64imac --disable-fp-emulation --host=riscv64-unknown-elf"
 	UCORE_USER_IMAGE="../user/img/ucore-riscv64.img"
@@ -475,7 +475,7 @@ fi
 # Hand generate build.rs
 if ! [[ -f outdir/libatomic_rt.a ]]
 then
-${CC} src/arch/riscv32/compiler_rt.c ${COMPILER_RT_CFLAGS} -c -o outdir/compiler_rt.o
+${CC} src/arch/riscv32/compiler_rt.c ${COMPILER_RT_CFLAGS} -O3 -c -o outdir/compiler_rt.o
 ${AR} r outdir/libatomic_rt.a outdir/compiler_rt.o
 fi
 
@@ -501,7 +501,10 @@ CNAME=ucore
 #if ! [[ -f outdir/${CNAME}.o ]]
 #then
 if [[ ${K210} = 1 ]]; then
-    export UCORE_FEATURE_ARGS='--cfg feature="m_mode" --cfg feature="board_k210"'
+    export UCORE_FEATURE_ARGS='--cfg feature="m_mode" --cfg feature="no_mmu" --cfg feature="board_k210"'
+    cp src/arch/riscv32/board/k210/linker.ld src/arch/riscv32/boot/linker64.ld
+else
+    cp src/arch/riscv32/board/u540/linker.ld src/arch/riscv32/boot/linker64.ld
 fi
 rustc --edition=2018 --crate-name ucore src/lib.rs \
     --color always --crate-type lib --emit=metadata,llvm-bc \
@@ -563,13 +566,12 @@ rustc --edition=2018 --crate-name ucore src/main.rs \
 
 if [[ ${K210} = 1 ]]; then
     ${OBJCOPY} outdir/ucore --strip-all -O binary outdir/ucore.bin
-    ${QEMU} -nographic -cpu sifive-e51 -machine sifive_e -kernel outdir/ucore -d in_asm 2> dump
+#    ${QEMU} -nographic -cpu sifive-e51 -machine sifive_e -kernel outdir/ucore
 else
     cd ../riscv-pk
 		rm build -r || true
 		mkdir -p build && cd build
-    ../configure \
-				${RISCV_PK_CONFIGURE_FLAGS} \
+    ../configure ${RISCV_PK_CONFIGURE_FLAGS} \
         --with-payload=../../kernel/outdir/ucore
     make
     cp bbl ../../kernel/outdir/kernel.bin
diff --git a/kernel/src/arch/riscv32/board/k210/linker.ld b/kernel/src/arch/riscv32/board/k210/linker.ld
new file mode 100644
index 0000000..4c38522
--- /dev/null
+++ b/kernel/src/arch/riscv32/board/k210/linker.ld
@@ -0,0 +1,49 @@
+/* Copy from bbl-ucore : https://ring00.github.io/bbl-ucore      */
+
+/* Simple linker script for the ucore kernel.
+   See the GNU ld 'info' manual ("info ld") to learn the syntax. */
+
+OUTPUT_ARCH(riscv)
+ENTRY(_start)
+
+BASE_ADDRESS = 0x40000000;
+
+SECTIONS
+{
+    /* Load the kernel at this address: "." means the current address */
+    . = BASE_ADDRESS;
+    start = .;
+
+    .text : {
+        stext = .;
+        KEEP(*(.text.boot))
+        *(.text .text.*)
+        . = ALIGN(4K);
+        etext = .;
+    }
+
+    .rodata : {
+        srodata = .;
+        *(.rodata .rodata.*)
+        . = ALIGN(4K);
+        erodata = .;
+    }
+
+    .data : {
+        sdata = .;
+        *(.data .data.*)
+        edata = .;
+    }
+
+    .stack : {
+        *(.bss.stack)
+    }
+
+    .bss : {
+        sbss = .;
+        *(.bss .bss.*)
+        ebss = .;
+    }
+
+    PROVIDE(end = .);
+}
diff --git a/kernel/src/arch/riscv32/boot/linker64.ld b/kernel/src/arch/riscv32/board/u540/linker.ld
similarity index 100%
rename from kernel/src/arch/riscv32/boot/linker64.ld
rename to kernel/src/arch/riscv32/board/u540/linker.ld
diff --git a/kernel/src/arch/riscv32/consts.rs b/kernel/src/arch/riscv32/consts.rs
index 40a8e6b..190d6cf 100644
--- a/kernel/src/arch/riscv32/consts.rs
+++ b/kernel/src/arch/riscv32/consts.rs
@@ -1,13 +1,19 @@
-// Physical address available on THINPAD:
-// [0x80000000, 0x80800000]
 const P2_SIZE: usize = 1 << 22;
 const P2_MASK: usize = 0x3ff << 22;
 pub const RECURSIVE_INDEX: usize = 0x3fe;
 pub const KERNEL_OFFSET: usize = 0;
 pub const KERNEL_P2_INDEX: usize = 0x8000_0000 >> 22;
+#[cfg(feature = "board_k210")]
+pub const KERNEL_HEAP_SIZE: usize = 0x0010_0000;
+#[cfg(not(feature = "board_k210"))]
 pub const KERNEL_HEAP_SIZE: usize = 0x00a0_0000;
+#[cfg(feature = "board_k210")]
+pub const MEMORY_OFFSET: usize = 0x4000_0000;
+#[cfg(not(feature = "board_k210"))]
 pub const MEMORY_OFFSET: usize = 0x8000_0000;
-//pub const MEMORY_END: usize = 0x8080_0000; //for thinpad not enough now
+#[cfg(feature = "board_k210")]
+pub const MEMORY_END: usize = 0x4060_0000;
+#[cfg(not(feature = "board_k210"))]
 pub const MEMORY_END: usize = 0x8100_0000;
 pub const USER_STACK_OFFSET: usize = 0x70000000;
 pub const USER_STACK_SIZE: usize = 0x10000;