From a75e52691dccfef86513be26bbae136e49b930f9 Mon Sep 17 00:00:00 2001
From: dzy <daizy15@mails.tsinghua.edu.cn>
Date: Thu, 20 Dec 2018 18:21:55 +0800
Subject: [PATCH] port to newer riscv crate supporting rv64
---
kernel/Cargo.lock | 4 +---
kernel/Cargo.toml | 2 +-
kernel/src/arch/riscv32/memory.rs | 4 ++--
kernel/src/arch/riscv32/paging.rs | 18 +++++++++---------
4 files changed, 13 insertions(+), 15 deletions(-)
diff --git a/kernel/Cargo.lock b/kernel/Cargo.lock
index b0600da..5a31da9 100644
--- a/kernel/Cargo.lock
+++ b/kernel/Cargo.lock
@@ -232,7 +232,6 @@ dependencies = [
[[package]]
name = "riscv"
version = "0.3.0"
-source = "git+https://github.com/riscv-and-rust-and-decaf/riscv#966eb26d5e8d77677f645d5e32877c678dcee572"
dependencies = [
"bare-metal 0.2.4 (registry+https://github.com/rust-lang/crates.io-index)",
"bit_field 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)",
@@ -332,7 +331,7 @@ dependencies = [
"once 0.3.3 (registry+https://github.com/rust-lang/crates.io-index)",
"pc-keyboard 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)",
"raw-cpuid 6.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
- "riscv 0.3.0 (git+https://github.com/riscv-and-rust-and-decaf/riscv)",
+ "riscv 0.3.0",
"simple-filesystem 0.0.1 (git+https://github.com/wangrunji0408/SimpleFileSystem-Rust?branch=multi-thread)",
"spin 0.4.10 (registry+https://github.com/rust-lang/crates.io-index)",
"uart_16550 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
@@ -473,7 +472,6 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
"checksum raw-cpuid 6.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "30a9d219c32c9132f7be513c18be77c9881c7107d2ab5569d205a6a0f0e6dc7d"
"checksum register 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)" = "e10f31b6d2299e5620986ad9fcdd66463e125ad72af4f403f9aedf7592d5ccdb"
"checksum remove_dir_all 0.5.1 (registry+https://github.com/rust-lang/crates.io-index)" = "3488ba1b9a2084d38645c4c08276a1752dcbf2c7130d74f1569681ad5d2799c5"
-"checksum riscv 0.3.0 (git+https://github.com/riscv-and-rust-and-decaf/riscv)" = "<none>"
"checksum rustc_version 0.2.3 (registry+https://github.com/rust-lang/crates.io-index)" = "138e3e0acb6c9fb258b19b67cb8abd63c00679d2851805ea151465464fe9030a"
"checksum semver 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)" = "1d7eb9ef2c18661902cc47e535f9bc51b78acd254da71d375c2f6720d9a40403"
"checksum semver-parser 0.7.0 (registry+https://github.com/rust-lang/crates.io-index)" = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3"
diff --git a/kernel/Cargo.toml b/kernel/Cargo.toml
index aa429ce..5412b9f 100644
--- a/kernel/Cargo.toml
+++ b/kernel/Cargo.toml
@@ -47,7 +47,7 @@ uart_16550 = "0.1"
pc-keyboard = "0.3"
[target.'cfg(target_arch = "riscv32")'.dependencies]
-riscv = { git = "https://github.com/riscv-and-rust-and-decaf/riscv" }
+riscv = { path = "../crate/riscv" }
bbl = { path = "../crate/bbl" }
[target.'cfg(target_arch = "aarch64")'.dependencies]
diff --git a/kernel/src/arch/riscv32/memory.rs b/kernel/src/arch/riscv32/memory.rs
index 7ba0b9f..2e919f0 100644
--- a/kernel/src/arch/riscv32/memory.rs
+++ b/kernel/src/arch/riscv32/memory.rs
@@ -26,7 +26,7 @@ pub fn init() {
static PAGE_TABLE_ROOT: PageData = PageData([0; PAGE_SIZE]);
unsafe { sstatus::set_sum(); } // Allow user memory access
- let frame = Frame::of_addr(PhysAddr::new(&PAGE_TABLE_ROOT as *const _ as u32));
+ let frame = Frame::of_addr(PhysAddr::new(&PAGE_TABLE_ROOT as *const _ as usize));
super::paging::setup_page_table(frame); // set up page table
// initialize heap and Frame allocator
init_frame_allocator();
@@ -107,4 +107,4 @@ extern {
fn end();
fn bootstack();
fn bootstacktop();
-}
\ No newline at end of file
+}
diff --git a/kernel/src/arch/riscv32/paging.rs b/kernel/src/arch/riscv32/paging.rs
index 6cce3f3..8afec98 100644
--- a/kernel/src/arch/riscv32/paging.rs
+++ b/kernel/src/arch/riscv32/paging.rs
@@ -19,7 +19,7 @@ use log::*;
*/
// need 1 page
pub fn setup_page_table(frame: Frame) {
- let p2 = unsafe { &mut *(frame.start_address().as_u32() as *mut RvPageTable) };
+ let p2 = unsafe { &mut *(frame.start_address().as_usize() as *mut RvPageTable) };
p2.zero();
p2.set_recursive(RECURSIVE_INDEX, frame.clone());
@@ -58,7 +58,7 @@ impl PageTable for ActivePageTable {
let flags = EF::VALID | EF::READABLE | EF::WRITABLE;
// here page is for the virtual address while frame is for the physical, both of them is 4096 bytes align
let page = Page::of_addr(VirtAddr::new(addr));
- let frame = Frame::of_addr(PhysAddr::new(target as u32));
+ let frame = Frame::of_addr(PhysAddr::new(target));
// map the page to the frame using FrameAllocatorForRiscv
// we may need frame allocator to alloc frame for new page table(first/second)
self.0.map_to(page, frame, flags, &mut FrameAllocatorForRiscv)
@@ -154,7 +154,7 @@ impl ActivePageTable {
let page = Page::of_addr(VirtAddr::new(0xcafebabe));
assert!(self.0.translate_page(page).is_none(), "temporary page is already mapped");
// Map it to table
- self.map(page.start_address().as_usize(), frame.start_address().as_u32() as usize);
+ self.map(page.start_address().as_usize(), frame.start_address().as_usize());
// Call f
let table = unsafe { &mut *(page.start_address().as_usize() as *mut _) };
f(self, table);
@@ -176,10 +176,10 @@ impl Entry for PageEntry {
fn clear_dirty(&mut self) { self.as_flags().remove(EF::DIRTY); }
fn set_writable(&mut self, value: bool) { self.as_flags().set(EF::WRITABLE, value); }
fn set_present(&mut self, value: bool) { self.as_flags().set(EF::VALID | EF::READABLE, value); }
- fn target(&self) -> usize { self.0.addr().as_u32() as usize }
+ fn target(&self) -> usize { self.0.addr().as_usize() }
fn set_target(&mut self, target: usize) {
let flags = self.0.flags();
- let frame = Frame::of_addr(PhysAddr::new(target as u32));
+ let frame = Frame::of_addr(PhysAddr::new(target));
self.0.set(frame, flags);
}
fn writable_shared(&self) -> bool { self.0.flags().contains(EF::RESERVED1) }
@@ -233,7 +233,7 @@ impl InactivePageTable for InactivePageTable0 {
* the inactive page table
*/
fn new_bare() -> Self {
- let frame = Self::alloc_frame().map(|target| Frame::of_addr(PhysAddr::new(target as u32)))
+ let frame = Self::alloc_frame().map(|target| Frame::of_addr(PhysAddr::new(target)))
.expect("failed to allocate frame");
active_table().with_temporary_map(&frame, |_, table: &mut RvPageTable| {
table.zero();
@@ -352,7 +352,7 @@ impl InactivePageTable0 {
impl Drop for InactivePageTable0 {
fn drop(&mut self) {
info!("PageTable dropping: {:?}", self);
- Self::dealloc_frame(self.p2_frame.start_address().as_u32() as usize);
+ Self::dealloc_frame(self.p2_frame.start_address().as_usize());
}
}
@@ -360,12 +360,12 @@ struct FrameAllocatorForRiscv;
impl FrameAllocator for FrameAllocatorForRiscv {
fn alloc(&mut self) -> Option<Frame> {
- alloc_frame().map(|addr| Frame::of_addr(PhysAddr::new(addr as u32)))
+ alloc_frame().map(|addr| Frame::of_addr(PhysAddr::new(addr)))
}
}
impl FrameDeallocator for FrameAllocatorForRiscv {
fn dealloc(&mut self, frame: Frame) {
- dealloc_frame(frame.start_address().as_u32() as usize);
+ dealloc_frame(frame.start_address().as_usize());
}
}