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@ -1,8 +1,6 @@
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//! Page table implementations for aarch64.
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use ucore_memory::memory_set::*;
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use ucore_memory::PAGE_SIZE;
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use ucore_memory::paging::*;
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use aarch64::asm::{tlb_invalidate, tlb_invalidate_all, flush_icache_all, ttbr_el1_read, ttbr_el1_write};
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use aarch64::asm::{tlb_invalidate, tlb_invalidate_all, ttbr_el1_read, ttbr_el1_write};
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use aarch64::{PhysAddr, VirtAddr};
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use aarch64::paging::{Mapper, PageTable as Aarch64PageTable, PageTableEntry, PageTableFlags as EF, RecursivePageTable};
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use aarch64::paging::{FrameAllocator, FrameDeallocator, Page, PhysFrame as Frame, Size4KiB, Size2MiB, Size1GiB};
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