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235 lines
7.6 KiB
235 lines
7.6 KiB
7 years ago
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#include "emulation.h"
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//#include "fp_emulation.h"
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#include "config.h"
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#include "unprivileged_memory.h"
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#include "mtrap.h"
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#include <limits.h>
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static DECLARE_EMULATION_FUNC(emulate_rvc)
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{
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#ifdef __riscv_compressed
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// the only emulable RVC instructions are FP loads and stores.
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# if !defined(__riscv_flen) && defined(PK_ENABLE_FP_EMULATION)
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write_csr(mepc, mepc + 2);
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// if FPU is disabled, punt back to the OS
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if (unlikely((mstatus & MSTATUS_FS) == 0))
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return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
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if ((insn & MASK_C_FLD) == MATCH_C_FLD) {
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uintptr_t addr = GET_RS1S(insn, regs) + RVC_LD_IMM(insn);
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if (unlikely(addr % sizeof(uintptr_t)))
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return misaligned_load_trap(regs, mcause, mepc);
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SET_F64_RD(RVC_RS2S(insn) << SH_RD, regs, load_uint64_t((void *)addr, mepc));
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} else if ((insn & MASK_C_FLDSP) == MATCH_C_FLDSP) {
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uintptr_t addr = GET_SP(regs) + RVC_LDSP_IMM(insn);
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if (unlikely(addr % sizeof(uintptr_t)))
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return misaligned_load_trap(regs, mcause, mepc);
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SET_F64_RD(insn, regs, load_uint64_t((void *)addr, mepc));
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} else if ((insn & MASK_C_FSD) == MATCH_C_FSD) {
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uintptr_t addr = GET_RS1S(insn, regs) + RVC_LD_IMM(insn);
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if (unlikely(addr % sizeof(uintptr_t)))
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return misaligned_store_trap(regs, mcause, mepc);
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store_uint64_t((void *)addr, GET_F64_RS2(RVC_RS2S(insn) << SH_RS2, regs), mepc);
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} else if ((insn & MASK_C_FSDSP) == MATCH_C_FSDSP) {
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uintptr_t addr = GET_SP(regs) + RVC_SDSP_IMM(insn);
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if (unlikely(addr % sizeof(uintptr_t)))
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return misaligned_store_trap(regs, mcause, mepc);
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store_uint64_t((void *)addr, GET_F64_RS2(RVC_RS2(insn) << SH_RS2, regs), mepc);
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} else
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# if __riscv_xlen == 32
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if ((insn & MASK_C_FLW) == MATCH_C_FLW) {
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uintptr_t addr = GET_RS1S(insn, regs) + RVC_LW_IMM(insn);
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if (unlikely(addr % 4))
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return misaligned_load_trap(regs, mcause, mepc);
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SET_F32_RD(RVC_RS2S(insn) << SH_RD, regs, load_int32_t((void *)addr, mepc));
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} else if ((insn & MASK_C_FLWSP) == MATCH_C_FLWSP) {
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uintptr_t addr = GET_SP(regs) + RVC_LWSP_IMM(insn);
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if (unlikely(addr % 4))
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return misaligned_load_trap(regs, mcause, mepc);
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SET_F32_RD(insn, regs, load_int32_t((void *)addr, mepc));
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} else if ((insn & MASK_C_FSW) == MATCH_C_FSW) {
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uintptr_t addr = GET_RS1S(insn, regs) + RVC_LW_IMM(insn);
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if (unlikely(addr % 4))
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return misaligned_store_trap(regs, mcause, mepc);
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store_uint32_t((void *)addr, GET_F32_RS2(RVC_RS2S(insn) << SH_RS2, regs), mepc);
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} else if ((insn & MASK_C_FSWSP) == MATCH_C_FSWSP) {
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uintptr_t addr = GET_SP(regs) + RVC_SWSP_IMM(insn);
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if (unlikely(addr % 4))
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return misaligned_store_trap(regs, mcause, mepc);
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store_uint32_t((void *)addr, GET_F32_RS2(RVC_RS2(insn) << SH_RS2, regs), mepc);
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} else
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# endif
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# endif
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#endif
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return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
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}
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void illegal_insn_trap(uintptr_t* regs, uintptr_t mcause, uintptr_t mepc)
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{
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asm (".pushsection .rodata\n"
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"illegal_insn_trap_table:\n"
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" .word truly_illegal_insn\n"
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#if !defined(__riscv_flen) && defined(PK_ENABLE_FP_EMULATION)
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" .word emulate_float_load\n"
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#else
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" .word truly_illegal_insn\n"
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#endif
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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#if !defined(__riscv_flen) && defined(PK_ENABLE_FP_EMULATION)
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" .word emulate_float_store\n"
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#else
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" .word truly_illegal_insn\n"
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#endif
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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#if !defined(__riscv_muldiv)
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" .word emulate_mul_div\n"
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#else
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" .word truly_illegal_insn\n"
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#endif
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" .word truly_illegal_insn\n"
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#if !defined(__riscv_muldiv) && __riscv_xlen >= 64
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" .word emulate_mul_div32\n"
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#else
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" .word truly_illegal_insn\n"
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#endif
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" .word truly_illegal_insn\n"
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#ifdef PK_ENABLE_FP_EMULATION
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" .word emulate_fmadd\n"
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" .word emulate_fmadd\n"
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" .word emulate_fmadd\n"
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" .word emulate_fmadd\n"
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" .word emulate_fp\n"
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#else
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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#endif
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word emulate_system_opcode\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .word truly_illegal_insn\n"
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" .popsection");
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uintptr_t mstatus = read_csr(mstatus);
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insn_t insn = read_csr(mbadaddr);
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if (unlikely((insn & 3) != 3)) {
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if (insn == 0)
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insn = get_insn(mepc, &mstatus);
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if ((insn & 3) != 3)
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return emulate_rvc(regs, mcause, mepc, mstatus, insn);
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}
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write_csr(mepc, mepc + 4);
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extern uint32_t illegal_insn_trap_table[];
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uint32_t* pf = (void*)illegal_insn_trap_table + (insn & 0x7c);
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emulation_func f = (emulation_func)(uintptr_t)*pf;
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f(regs, mcause, mepc, mstatus, insn);
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}
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__attribute__((noinline))
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DECLARE_EMULATION_FUNC(truly_illegal_insn)
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{
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return redirect_trap(mepc, mstatus, insn);
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}
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static inline int emulate_read_csr(int num, uintptr_t mstatus, uintptr_t* result)
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{
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uintptr_t counteren = -1;
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if (EXTRACT_FIELD(mstatus, MSTATUS_MPP) == PRV_U)
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counteren = read_csr(scounteren);
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switch (num)
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{
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case CSR_TIME:
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if (!((counteren >> (CSR_TIME - CSR_CYCLE)) & 1))
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return -1;
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*result = *mtime;
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return 0;
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#if __riscv_xlen == 32
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case CSR_TIMEH:
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if (!((counteren >> (CSR_TIME - CSR_CYCLE)) & 1))
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return -1;
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*result = *mtime >> 32;
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return 0;
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#endif
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#if !defined(__riscv_flen) && defined(PK_ENABLE_FP_EMULATION)
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case CSR_FRM:
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if ((mstatus & MSTATUS_FS) == 0) break;
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*result = GET_FRM();
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return 0;
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case CSR_FFLAGS:
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if ((mstatus & MSTATUS_FS) == 0) break;
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*result = GET_FFLAGS();
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return 0;
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case CSR_FCSR:
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if ((mstatus & MSTATUS_FS) == 0) break;
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*result = GET_FCSR();
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return 0;
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#endif
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}
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return -1;
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}
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static inline int emulate_write_csr(int num, uintptr_t value, uintptr_t mstatus)
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{
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switch (num)
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{
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#if !defined(__riscv_flen) && defined(PK_ENABLE_FP_EMULATION)
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case CSR_FRM: SET_FRM(value); return 0;
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case CSR_FFLAGS: SET_FFLAGS(value); return 0;
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case CSR_FCSR: SET_FCSR(value); return 0;
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#endif
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}
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return -1;
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}
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DECLARE_EMULATION_FUNC(emulate_system_opcode)
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{
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int rs1_num = (insn >> 15) & 0x1f;
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uintptr_t rs1_val = GET_RS1(insn, regs);
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int csr_num = (uint32_t)insn >> 20;
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uintptr_t csr_val, new_csr_val;
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if (emulate_read_csr(csr_num, mstatus, &csr_val))
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return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
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int do_write = rs1_num;
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#if 0
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switch (GET_RM(insn))
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{
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case 0: return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
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case 1: new_csr_val = rs1_val; do_write = 1; break;
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case 2: new_csr_val = csr_val | rs1_val; break;
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case 3: new_csr_val = csr_val & ~rs1_val; break;
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case 4: return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
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case 5: new_csr_val = rs1_num; do_write = 1; break;
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case 6: new_csr_val = csr_val | rs1_num; break;
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case 7: new_csr_val = csr_val & ~rs1_num; break;
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}
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#endif
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if (do_write && emulate_write_csr(csr_num, new_csr_val, mstatus))
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return truly_illegal_insn(regs, mcause, mepc, mstatus, insn);
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SET_RD(insn, regs, csr_val);
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}
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