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@ -1,58 +1,79 @@
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//! Page table implementations for aarch64.
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use crate::memory::{alloc_frame, dealloc_frame, phys_to_virt};
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use aarch64::asm::{tlb_invalidate, tlb_invalidate_all, ttbr_el1_read, ttbr_el1_write};
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use aarch64::paging::memory_attribute::*;
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use aarch64::paging::{FrameAllocator, FrameDeallocator, Page, PhysFrame as Frame, Size4KiB};
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use aarch64::paging::{
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Mapper, PageTable as Aarch64PageTable, PageTableEntry, PageTableFlags as EF, RecursivePageTable,
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frame::PhysFrame as Frame,
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mapper::{MappedPageTable, Mapper},
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memory_attribute::*,
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page_table::{PageTable as Aarch64PageTable, PageTableEntry, PageTableFlags as EF},
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FrameAllocator, FrameDeallocator, Page as PageAllSizes, Size4KiB,
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};
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use aarch64::{PhysAddr, VirtAddr};
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use log::*;
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use rcore_memory::paging::*;
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// Depends on kernel
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use crate::consts::{KERNEL_OFFSET, KERNEL_PML4, RECURSIVE_INDEX};
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use crate::memory::{active_table, alloc_frame, dealloc_frame};
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pub struct ActivePageTable(RecursivePageTable);
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type Page = PageAllSizes<Size4KiB>;
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pub struct PageTableImpl {
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page_table: MappedPageTable<'static, fn(Frame) -> *mut Aarch64PageTable>,
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root_frame: Frame,
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entry: PageEntry,
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}
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pub struct PageEntry(PageTableEntry);
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pub struct PageEntry(&'static mut PageTableEntry, Page);
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impl PageTable for ActivePageTable {
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impl PageTable for PageTableImpl {
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fn map(&mut self, addr: usize, target: usize) -> &mut Entry {
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let flags = EF::default();
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let attr = MairNormal::attr_value();
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self.0
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.map_to(
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Page::of_addr(addr as u64),
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Frame::of_addr(target as u64),
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flags,
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attr,
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&mut FrameAllocatorForAarch64,
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)
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.unwrap()
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.flush();
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unsafe {
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self.page_table
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.map_to(
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Page::of_addr(addr as u64),
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Frame::of_addr(target as u64),
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flags,
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attr,
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&mut FrameAllocatorForAarch64,
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)
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.unwrap()
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.flush();
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}
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self.get_entry(addr).expect("fail to get entry")
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}
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fn unmap(&mut self, addr: usize) {
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self.0.unmap(Page::of_addr(addr as u64)).unwrap().1.flush();
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self.page_table
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.unmap(Page::of_addr(addr as u64))
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.unwrap()
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.1
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.flush();
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}
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fn get_entry(&mut self, vaddr: usize) -> Option<&mut Entry> {
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// get p1 entry
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let entry_addr =
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((vaddr >> 9) & 0o777_777_777_7770) | (RECURSIVE_INDEX << 39) | (vaddr & KERNEL_OFFSET);
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Some(unsafe { &mut *(entry_addr as *mut PageEntry) })
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let page = Page::of_addr(vaddr as u64);
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if let Ok(e) = self.page_table.get_entry_mut(page) {
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let e = unsafe { &mut *(e as *mut PageTableEntry) };
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self.entry = PageEntry(e, page);
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Some(&mut self.entry as &mut Entry)
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} else {
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None
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}
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}
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}
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impl PageTableExt for ActivePageTable {
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const TEMP_PAGE_ADDR: usize = KERNEL_OFFSET | 0xcafeb000;
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fn get_page_slice_mut<'a>(&mut self, addr: usize) -> &'a mut [u8] {
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let frame = self
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.page_table
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.translate_page(Page::of_addr(addr as u64))
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.unwrap();
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let vaddr = phys_to_virt(frame.start_address().as_u64() as usize);
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unsafe { core::slice::from_raw_parts_mut(vaddr as *mut u8, 0x1000) }
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}
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}
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impl ActivePageTable {
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pub unsafe fn new() -> Self {
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ActivePageTable(RecursivePageTable::new(RECURSIVE_INDEX as u16))
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}
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fn frame_to_page_table(frame: Frame) -> *mut Aarch64PageTable {
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let vaddr = phys_to_virt(frame.start_address().as_u64() as usize);
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vaddr as *mut Aarch64PageTable
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}
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#[repr(u8)]
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@ -65,8 +86,7 @@ pub enum MMIOType {
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impl Entry for PageEntry {
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fn update(&mut self) {
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let addr = VirtAddr::new_unchecked((self as *const _ as u64) << 9);
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tlb_invalidate(addr);
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tlb_invalidate(self.1.start_address());
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}
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fn present(&self) -> bool {
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@ -100,7 +120,8 @@ impl Entry for PageEntry {
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self.0.addr().as_u64() as usize
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}
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fn set_target(&mut self, target: usize) {
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self.0.modify_addr(PhysAddr::new(target as u64));
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self.0
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.set_addr(PhysAddr::new(target as u64), self.0.flags(), self.0.attr());
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}
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fn writable_shared(&self) -> bool {
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self.0.flags().contains(EF::WRITABLE_SHARED)
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@ -163,7 +184,7 @@ impl Entry for PageEntry {
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2 => MairNormalNonCacheable::attr_value(),
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_ => return,
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};
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self.0.modify_attr(attr);
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self.0.set_attr(attr);
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}
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}
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@ -178,40 +199,45 @@ impl PageEntry {
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self.0.flags().contains(EF::DIRTY)
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}
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fn as_flags(&mut self) -> &mut EF {
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unsafe { &mut *(self as *mut _ as *mut EF) }
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unsafe { &mut *(self.0 as *mut _ as *mut EF) }
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}
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}
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#[derive(Debug)]
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pub struct InactivePageTable0 {
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p4_frame: Frame,
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impl PageTableImpl {
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/// Unsafely get the current active page table.
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/// WARN: You MUST call `core::mem::forget` for it after use!
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pub unsafe fn active() -> Self {
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let frame = Frame::of_addr(PageTableImpl::active_token() as u64);
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let table = &mut *frame_to_page_table(frame);
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PageTableImpl {
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page_table: MappedPageTable::new(table, frame_to_page_table),
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root_frame: frame,
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entry: core::mem::uninitialized(),
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}
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}
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}
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impl InactivePageTable for InactivePageTable0 {
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type Active = ActivePageTable;
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impl PageTableExt for PageTableImpl {
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fn new_bare() -> Self {
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let target = alloc_frame().expect("failed to allocate frame");
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let frame = Frame::of_addr(target as u64);
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active_table().with_temporary_map(target, |_, table: &mut Aarch64PageTable| {
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table.zero();
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// set up recursive mapping for the table
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table[RECURSIVE_INDEX].set_frame(
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frame.clone(),
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EF::default(),
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MairNormal::attr_value(),
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);
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});
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InactivePageTable0 { p4_frame: frame }
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let table = unsafe { &mut *frame_to_page_table(frame) };
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table.zero();
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unsafe {
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PageTableImpl {
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page_table: MappedPageTable::new(table, frame_to_page_table),
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root_frame: frame,
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entry: core::mem::uninitialized(),
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}
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}
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}
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fn map_kernel(&mut self) {
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// When the new InactivePageTable is created for the user MemorySet, it's use ttbr0 as the
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// TTBR. And the kernel TTBR ttbr1 will never changed, so we needn't call map_kernel()
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// kernel page table is based on TTBR1_EL1 and will nerver change.
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}
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fn token(&self) -> usize {
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self.p4_frame.start_address().as_u64() as usize // as TTBRx_EL1
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self.root_frame.start_address().as_u64() as usize // as TTBR0_EL1
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}
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unsafe fn set_token(token: usize) {
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@ -225,73 +251,25 @@ impl InactivePageTable for InactivePageTable0 {
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fn flush_tlb() {
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tlb_invalidate_all();
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}
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fn edit<T>(&mut self, f: impl FnOnce(&mut Self::Active) -> T) -> T {
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let target = ttbr_el1_read(1);
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if self.p4_frame == target {
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return f(&mut active_table());
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}
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let target = target.start_address().as_u64() as usize;
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active_table().with_temporary_map(
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target,
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|active_table, p4_table: &mut Aarch64PageTable| {
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let backup = p4_table[RECURSIVE_INDEX].clone();
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let old_frame = ttbr_el1_read(0);
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// overwrite recursive mapping
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p4_table[RECURSIVE_INDEX].set_frame(
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self.p4_frame.clone(),
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EF::default(),
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MairNormal::attr_value(),
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);
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ttbr_el1_write(0, self.p4_frame.clone());
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tlb_invalidate_all();
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// execute f in the new context
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let ret = f(active_table);
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// restore recursive mapping to original p4 table
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p4_table[RECURSIVE_INDEX] = backup;
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ttbr_el1_write(0, old_frame);
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tlb_invalidate_all();
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ret
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},
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)
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}
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}
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impl InactivePageTable0 {
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/// Activate as kernel page table (TTBR0).
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/// Used in `arch::memory::remap_the_kernel()`.
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pub unsafe fn activate_as_kernel(&self) {
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let old_frame = ttbr_el1_read(1);
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let new_frame = self.p4_frame.clone();
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debug!("switch TTBR1 {:?} -> {:?}", old_frame, new_frame);
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if old_frame != new_frame {
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ttbr_el1_write(0, Frame::of_addr(0));
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ttbr_el1_write(1, new_frame);
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tlb_invalidate_all();
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}
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}
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}
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impl Drop for InactivePageTable0 {
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impl Drop for PageTableImpl {
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fn drop(&mut self) {
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info!("PageTable dropping: {:?}", self);
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dealloc_frame(self.p4_frame.start_address().as_u64() as usize);
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info!("PageTable dropping: {:?}", self.root_frame);
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dealloc_frame(self.root_frame.start_address().as_u64() as usize);
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}
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}
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struct FrameAllocatorForAarch64;
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impl FrameAllocator<Size4KiB> for FrameAllocatorForAarch64 {
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fn alloc(&mut self) -> Option<Frame> {
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unsafe impl FrameAllocator<Size4KiB> for FrameAllocatorForAarch64 {
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fn allocate_frame(&mut self) -> Option<Frame> {
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alloc_frame().map(|addr| Frame::of_addr(addr as u64))
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}
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}
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impl FrameDeallocator<Size4KiB> for FrameAllocatorForAarch64 {
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fn dealloc(&mut self, frame: Frame) {
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fn deallocate_frame(&mut self, frame: Frame) {
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dealloc_frame(frame.start_address().as_u64() as usize);
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}
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}
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Harry Chen
6 years ago