diff --git a/kernel/src/arch/riscv32/memory.rs b/kernel/src/arch/riscv32/memory.rs
index 0f9cfb6..45ba782 100644
--- a/kernel/src/arch/riscv32/memory.rs
+++ b/kernel/src/arch/riscv32/memory.rs
@@ -4,13 +4,14 @@ use super::riscv::{addr::*, register::sstatus};
 use ucore_memory::PAGE_SIZE;
 
 pub fn init() {
-    #[repr(align(4096))]
+    #[repr(align(4096))]  // align the PageData struct to 4096 bytes
     struct PageData([u8; PAGE_SIZE]);
     static PAGE_TABLE_ROOT: PageData = PageData([0; PAGE_SIZE]);
 
     unsafe { sstatus::set_sum(); }  // Allow user memory access
-    let frame = Frame::of_addr(PhysAddr::new(&PAGE_TABLE_ROOT as *const _ as u32));
-    super::paging::setup_page_table(frame);
+    let frame = Frame::of_addr(PhysAddr::new(&PAGE_TABLE_ROOT as *const _ as u32));  
+    super::paging::setup_page_table(frame); // set up page table
+    // initialize heap and Frame allocator
     init_frame_allocator();
     remap_the_kernel();
     init_heap();
@@ -23,9 +24,19 @@ fn init_frame_allocator() {
 
     let mut ba = FRAME_ALLOCATOR.lock();
     use consts::{KERNEL_HEAP_OFFSET, KERNEL_HEAP_SIZE};
+    // keep memory for the kernel heap and set other physical memory available in BitAlloc 
     ba.insert(to_range(KERNEL_HEAP_OFFSET + KERNEL_HEAP_SIZE, MEMORY_END));
     info!("FrameAllocator init end");
 
+    /*
+    * @param:
+    *   start: start address 
+    *   end: end address
+    * @brief: 
+    *   transform the memory address to the page number
+    * @retval:
+    *   the page number range from start address to end address
+    */
     fn to_range(start: usize, end: usize) -> Range<usize> {
         let page_start = (start - MEMORY_OFFSET) / PAGE_SIZE;
         let page_end = (end - MEMORY_OFFSET - 1) / PAGE_SIZE + 1;
@@ -35,6 +46,7 @@ fn init_frame_allocator() {
 
 fn remap_the_kernel() {
     use consts::{KERNEL_HEAP_OFFSET, KERNEL_HEAP_SIZE};
+    // set up kernel stack
     let kstack = Stack {
         top: bootstacktop as usize,
         bottom: bootstack as usize + PAGE_SIZE,
diff --git a/kernel/src/arch/riscv32/mod.rs b/kernel/src/arch/riscv32/mod.rs
index 13d9ad3..140c712 100644
--- a/kernel/src/arch/riscv32/mod.rs
+++ b/kernel/src/arch/riscv32/mod.rs
@@ -11,10 +11,15 @@ pub mod compiler_rt;
 #[no_mangle]
 pub extern fn rust_main() -> ! {
     println!("Hello RISCV! {}", 123);
+    // First init log mod, so that we can print log info.
     ::logging::init();
+    // Init interrupt handling.
     interrupt::init();
+    // Init physical memory management and heap
     memory::init();
+    // Init timer interrupt
     timer::init();
+    
     ::kmain();
 }
 
diff --git a/kernel/src/arch/riscv32/paging.rs b/kernel/src/arch/riscv32/paging.rs
index 680448b..f6bbe77 100644
--- a/kernel/src/arch/riscv32/paging.rs
+++ b/kernel/src/arch/riscv32/paging.rs
@@ -10,6 +10,12 @@ use ucore_memory::memory_set::*;
 use ucore_memory::PAGE_SIZE;
 use ucore_memory::paging::*;
 
+/*
+* @param:
+*   Frame: page table root frame
+* @brief:
+*   setup page table in the frame 
+*/
 // need 1 page
 pub fn setup_page_table(frame: Frame) {
     let p2 = unsafe { &mut *(frame.start_address().as_u32() as *mut RvPageTable) };
diff --git a/kernel/src/arch/riscv32/timer.rs b/kernel/src/arch/riscv32/timer.rs
index 4fb16eb..a8e9bce 100644
--- a/kernel/src/arch/riscv32/timer.rs
+++ b/kernel/src/arch/riscv32/timer.rs
@@ -26,12 +26,14 @@ pub fn init() {
     info!("timer: init end");
 }
 
+// set the next timer interrupt
 pub fn set_next() {
     // 100Hz @ QEMU
     let timebase = 250000;
     set_timer(get_cycle() + timebase);
 }
 
+// set time for timer interrupt
 fn set_timer(t: u64) {
     #[cfg(feature = "no_bbl")]
     unsafe {
diff --git a/kernel/src/consts.rs b/kernel/src/consts.rs
index 4dddae0..d713b95 100644
--- a/kernel/src/consts.rs
+++ b/kernel/src/consts.rs
@@ -8,6 +8,7 @@ pub use self::x86_64::*;
 pub const MAX_CPU_NUM: usize = 8;
 pub const MAX_PROCESS_NUM: usize = 48;
 
+// Memory address for riscv32
 #[cfg(target_arch = "riscv32")]
 mod riscv {
     // Physical address available on THINPAD:
@@ -26,6 +27,7 @@ mod riscv {
     pub const USER32_STACK_OFFSET: usize = USER_STACK_OFFSET;
 }
 
+// Memory address for x86_64
 #[cfg(target_arch = "x86_64")]
 mod x86_64 {
     // Copy from Redox consts.rs:
diff --git a/user/ucore-ulib/Cargo.lock b/user/ucore-ulib/Cargo.lock
new file mode 100644
index 0000000..ea99e3c
--- /dev/null
+++ b/user/ucore-ulib/Cargo.lock
@@ -0,0 +1,4 @@
+[[package]]
+name = "ucore-ulib"
+version = "0.1.0"
+