From 250f1385d326dc1014c5e37c30c508ae20ace691 Mon Sep 17 00:00:00 2001 From: WangRunji Date: Wed, 31 Oct 2018 11:39:42 +0800 Subject: [PATCH] Better debug print for TrapFrame on RV32 --- kernel/src/arch/riscv32/context.rs | 27 ++++++++++++++++++++++++--- 1 file changed, 24 insertions(+), 3 deletions(-) diff --git a/kernel/src/arch/riscv32/context.rs b/kernel/src/arch/riscv32/context.rs index 4a00cfa..d1a6d61 100644 --- a/kernel/src/arch/riscv32/context.rs +++ b/kernel/src/arch/riscv32/context.rs @@ -1,6 +1,6 @@ use super::super::riscv::register::*; -#[derive(Debug, Clone)] +#[derive(Clone)] #[repr(C)] pub struct TrapFrame { pub x: [usize; 32], @@ -34,8 +34,29 @@ impl TrapFrame { tf.sstatus.set_spp(sstatus::SPP::User); tf } - pub fn is_user(&self) -> bool { - unimplemented!() +} + +use core::fmt::{Debug, Formatter, Error}; +impl Debug for TrapFrame { + fn fmt(&self, f: &mut Formatter) -> Result<(), Error> { + struct Regs<'a>(&'a [usize; 32]); + impl<'a> Debug for Regs<'a> { + fn fmt(&self, f: &mut Formatter) -> Result<(), Error> { + const REG_NAME: [&str; 32] = [ + "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", + "s0", "s1", "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7", + "s2", "s3", "s4", "s5", "s6", "s7", "s8", "s9", "s10", "s11", + "t3", "t4", "t5", "t6"]; + f.debug_map().entries(REG_NAME.iter().zip(self.0)).finish() + } + } + f.debug_struct("TrapFrame") + .field("regs", &Regs(&self.x)) + .field("sstatus", &self.sstatus) + .field("sepc", &self.sepc) + .field("sbadaddr", &self.sbadaddr) + .field("scause", &self.scause) + .finish() } }