@ -20,7 +20,7 @@
},
"llvm-target": "aarch64-unknown-none",
"no-compiler-rt": true,
"features": "+a53,+strict-align",
"features": "+a53,+strict-align,-neon",
"max-atomic-width": 128,
"os": "none",
"panic": "abort",
@ -55,7 +55,6 @@ switch_to_el1:
movk x0, #0x8000, lsl #16
msr hcr_el2, x0
# don't trap accessing SVE registers (ref: D10.2.30)
msr cptr_el2, xzr