From 60ed3a2ed4c7e95c15b23fb4652bf224ef01971e Mon Sep 17 00:00:00 2001 From: WangRunji Date: Sun, 17 Jun 2018 01:41:43 +0800 Subject: [PATCH] Fix SMP. Move cpu::init to asm. --- src/arch/x86_64/boot/boot.asm | 8 ++++---- src/arch/x86_64/boot/entryother.asm | 8 ++++---- src/arch/x86_64/cpu.rs | 17 ----------------- src/lib.rs | 5 +---- 4 files changed, 9 insertions(+), 29 deletions(-) diff --git a/src/arch/x86_64/boot/boot.asm b/src/arch/x86_64/boot/boot.asm index ebd1d5c..01cafc4 100644 --- a/src/arch/x86_64/boot/boot.asm +++ b/src/arch/x86_64/boot/boot.asm @@ -128,15 +128,15 @@ enable_paging: or eax, 1 << 5 mov cr4, eax - ; set the long mode bit in the EFER MSR (model specific register) + ; set the long mode bit & no execute bit in the EFER MSR (model specific register) mov ecx, 0xC0000080 rdmsr - or eax, 1 << 8 + or eax, 1 << 8 | 1 << 11 wrmsr - ; enable paging in the cr0 register + ; enable paging & write protect in the cr0 register mov eax, cr0 - or eax, 1 << 31 + or eax, 1 << 31 | 1 << 16 mov cr0, eax ret diff --git a/src/arch/x86_64/boot/entryother.asm b/src/arch/x86_64/boot/entryother.asm index 9604de0..b8fc568 100644 --- a/src/arch/x86_64/boot/entryother.asm +++ b/src/arch/x86_64/boot/entryother.asm @@ -85,15 +85,15 @@ enable_paging: or eax, 1 << 5 mov cr4, eax - ; set the long mode bit in the EFER MSR (model specific register) + ; set the long mode bit & no execute bit in the EFER MSR (model specific register) mov ecx, 0xC0000080 rdmsr - or eax, 1 << 8 + or eax, 1 << 8 | 1 << 11 wrmsr - ; enable paging in the cr0 register + ; enable paging & write protect in the cr0 register mov eax, cr0 - or eax, 1 << 31 + or eax, 1 << 31 | 1 << 16 mov cr0, eax ret diff --git a/src/arch/x86_64/cpu.rs b/src/arch/x86_64/cpu.rs index a29a1af..8e93cca 100644 --- a/src/arch/x86_64/cpu.rs +++ b/src/arch/x86_64/cpu.rs @@ -1,20 +1,3 @@ -pub fn init() { - enable_nxe_bit(); - enable_write_protect_bit(); -} - -/// Enable 'No-Execute' bit in page entry -pub fn enable_nxe_bit() { - use x86_64::registers::model_specific::*; - unsafe { Efer::update(|flags| flags.insert(EferFlags::NO_EXECUTE_ENABLE)); } -} - -/// Enable write protection in kernel mode -pub fn enable_write_protect_bit() { - use x86_64::registers::control::*; - unsafe { Cr0::update(|flags| flags.insert(Cr0Flags::WRITE_PROTECT)); } -} - /// Exit qemu /// See: https://wiki.osdev.org/Shutdown /// Must run qemu with `-device isa-debug-exit` diff --git a/src/lib.rs b/src/lib.rs index e37e010..bacf020 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -64,7 +64,6 @@ mod arch; /// The entry point of Rust kernel #[no_mangle] pub extern "C" fn rust_main(multiboot_information_address: usize) -> ! { - arch::cpu::init(); arch::idt::init(); io::init(); @@ -88,8 +87,7 @@ pub extern "C" fn rust_main(multiboot_information_address: usize) -> ! { kernel_memory.push(MemoryArea::new_identity(addr, addr + count * 0x1000, MemoryAttr::default(), "acpi")) }); - // FIXME: page fault in SMP -// arch::smp::start_other_cores(&acpi, &mut kernel_memory); + arch::smp::start_other_cores(&acpi, &mut kernel_memory); process::init(kernel_memory); fs::load_sfs(); @@ -123,7 +121,6 @@ pub extern "C" fn rust_main(multiboot_information_address: usize) -> ! { /// The entry point for another processors #[no_mangle] pub extern "C" fn other_main() -> ! { - arch::cpu::init(); arch::gdt::init(); arch::idt::init(); arch::driver::apic::other_init();