diff --git a/.gitignore b/.gitignore index dc3bbf3..4b4a5a8 100644 --- a/.gitignore +++ b/.gitignore @@ -1,7 +1,7 @@ build target /kernel/src/arch/x86_64/interrupt/vector.asm -/kernel/src/arch/*/boot/dtb.S +*.gen.s *.dtb Cargo.lock diff --git a/kernel/Makefile b/kernel/Makefile index 07d5259..182f78f 100644 --- a/kernel/Makefile +++ b/kernel/Makefile @@ -317,6 +317,9 @@ else ifeq ($(arch), riscv64) else ifeq ($(arch), aarch64) @cargo xbuild $(build_args) else ifeq ($(arch), mipsel) + @for file in context entry trap ; do \ + $(cc) -E src/arch/$(arch)/boot/$${file}.S -o src/arch/$(arch)/boot/$${file}.gen.s ; \ + done @cargo xbuild $(build_args) endif diff --git a/kernel/build.rs b/kernel/build.rs index 3efcadb..6390c32 100644 --- a/kernel/build.rs +++ b/kernel/build.rs @@ -60,13 +60,12 @@ fn gen_dtb_asm(arch: &String, _board: &String) -> Result<()> { panic!("DTB `{}` not found", dtb) } - let mut f = File::create(format!("src/arch/{}/boot/dtb.S", arch)).unwrap(); + let mut f = File::create(format!("src/arch/{}/boot/dtb.gen.s", arch)).unwrap(); println!("cargo:rerun-if-changed={}", dtb); println!("cargo:rerun-if-env-changed=DTB"); writeln!(f, "# generated by build.rs - do not edit")?; - writeln!(f, ".intel_syntax noprefix")?; write!(f, r#" .section .dtb,"a" .align 12 diff --git a/kernel/src/arch/mipsel/boot/entry.S b/kernel/src/arch/mipsel/boot/entry.S index 0d0e70b..019006c 100644 --- a/kernel/src/arch/mipsel/boot/entry.S +++ b/kernel/src/arch/mipsel/boot/entry.S @@ -11,14 +11,15 @@ _start: # set ebase la t0, trap_entry - mfc0 t1, 15 # C0_EBASE + mfc0 t1, $15 # C0_EBASE or t1, t1, t0 - mtc0 t1, 15 + mtc0 t1, $15 # exit bootstrap mode - mfc0 t0, 12 # C0_STATUS - andi t0, t0, 0xFFBFFFFF # set BEV (bit 22) to 0 - mtc0 t0, 12 + mfc0 t0, $12 # C0_STATUS + li t1, 0xFFBFFFFF # set BEV (bit 22) to 0 + and t0, t0, t1 + mtc0 t0, $12 # directly jump to main function b rust_main diff --git a/kernel/src/arch/mipsel/context.rs b/kernel/src/arch/mipsel/context.rs index c44509c..bcb5702 100644 --- a/kernel/src/arch/mipsel/context.rs +++ b/kernel/src/arch/mipsel/context.rs @@ -159,7 +159,7 @@ impl Context { #[naked] #[inline(never)] pub unsafe extern fn switch(&mut self, _target: &mut Self) { - asm!(include_str!("boot/context.S")); + asm!(include_str!("boot/context.gen.s")); } /// Constructs a null Context for the current running thread. diff --git a/kernel/src/arch/mipsel/mod.rs b/kernel/src/arch/mipsel/mod.rs index c3f4692..ce90f55 100644 --- a/kernel/src/arch/mipsel/mod.rs +++ b/kernel/src/arch/mipsel/mod.rs @@ -74,6 +74,6 @@ fn others_main() -> ! { const BOOT_CPU_ID: u32 = 0; -global_asm!(include_str!("boot/entry.S")); -global_asm!(include_str!("boot/trap.S")); -global_asm!(include_str!("boot/dtb.S")); +global_asm!(include_str!("boot/entry.gen.s")); +global_asm!(include_str!("boot/trap.gen.s")); +global_asm!(include_str!("boot/dtb.gen.s"));