aarch64: set TTBR1 = TTBR0 in InactivePageTable::edit(), swap is OK

TODO: flush icache in the right place
master
equation314 6 years ago
parent 6cf679b596
commit 6879c66e58

4
kernel/Cargo.lock generated

@ -1,12 +1,10 @@
[[package]]
name = "aarch64"
version = "2.2.2"
source = "git+https://github.com/equation314/aarch64#47bf5439f5a1379f0fef6272853cf684207a4e45"
source = "git+https://github.com/equation314/aarch64#e3b60adb233ad34d05443e0b5ec34cac29253296"
dependencies = [
"bare-metal 0.2.4 (registry+https://github.com/rust-lang/crates.io-index)",
"bit_field 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)",
"bitflags 1.0.4 (registry+https://github.com/rust-lang/crates.io-index)",
"os_bootinfo 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
"register 0.2.1 (registry+https://github.com/rust-lang/crates.io-index)",
"usize_conversions 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
"ux 0.1.2 (registry+https://github.com/rust-lang/crates.io-index)",

@ -93,8 +93,9 @@ fn handle_syscall(num: u16, tf: &mut TrapFrame) {
}
fn handle_page_fault(tf: &mut TrapFrame) {
let addr = FAR_EL1.get();
error!("\nEXCEPTION: Page Fault @ {:#x}", addr);
crate::trap::error(tf);
let addr = FAR_EL1.get() as usize;
if !crate::memory::page_fault_handler(addr) {
error!("\nEXCEPTION: Page Fault @ {:#x}", addr);
crate::trap::error(tf);
}
}

@ -64,8 +64,10 @@ impl PageTable for ActivePageTable {
flush.flush();
}
fn get_entry(&mut self, addr: usize) -> Option<&mut PageEntry> {
let entry_addr = ((addr >> 9) & 0o777_777_777_7770) | (RECURSIVE_INDEX << 39);
fn get_entry(&mut self, vaddr: usize) -> Option<&mut PageEntry> {
// get p1 entry
let entry_addr = ((vaddr >> 9) & 0o777_777_777_7770) | (RECURSIVE_INDEX << 39)
| (vaddr & 0xffff_0000_0000_0000);
Some(unsafe { &mut *(entry_addr as *mut PageEntry) })
}
@ -209,9 +211,11 @@ impl InactivePageTable for InactivePageTable0 {
fn edit(&mut self, f: impl FnOnce(&mut Self::Active)) {
active_table().with_temporary_map(&ttbr_el1_read(0), |active_table, p4_table: &mut Aarch64PageTable| {
let backup = p4_table[RECURSIVE_INDEX].clone();
let old_frame = ttbr_el1_read(1);
// overwrite recursive mapping
p4_table[RECURSIVE_INDEX].set_frame(self.p4_frame.clone(), EF::default(), MairNormal::attr_value());
ttbr_el1_write(1, self.p4_frame.clone());
tlb_invalidate_all();
// execute f in the new context
@ -219,6 +223,7 @@ impl InactivePageTable for InactivePageTable0 {
// restore recursive mapping to original p4 table
p4_table[RECURSIVE_INDEX] = backup;
ttbr_el1_write(1, old_frame);
tlb_invalidate_all();
});
}

@ -5,6 +5,7 @@
#![feature(optin_builtin_traits)]
#![feature(panic_info_message)]
#![feature(global_asm)]
#![feature(extern_crate_item_prelude)]
#![no_std]
// just keep it ...

@ -145,7 +145,6 @@ impl ContextImpl {
}
#[cfg(not(feature = "no_mmu"))]
#[cfg(not(target_arch = "aarch64"))]
impl Drop for ContextImpl {
fn drop(&mut self){
info!("come in to drop for ContextImpl");
@ -256,7 +255,7 @@ fn memory_attr_from(elf_flags: Flags) -> MemoryAttr {
* @brief:
* map the memory area in the memory_set swappalbe, specially for the user process
*/
#[cfg(not(any(feature = "no_mmu", target_arch = "aarch64")))]
#[cfg(not(feature = "no_mmu"))]
pub fn memory_set_map_swappable(memory_set: &mut MemorySet) {
info!("COME INTO memory set map swappable!");
let pt = unsafe {
@ -271,8 +270,7 @@ pub fn memory_set_map_swappable(memory_set: &mut MemorySet) {
info!("Finishing setting pages swappable");
}
#[cfg(any(feature = "no_mmu", target_arch = "aarch64"))]
#[cfg(feature = "no_mmu")]
pub fn memory_set_map_swappable(memory_set: &mut MemorySet) {
// FIXME: Page Fault on aarch64
// NOTE: This function may disappear after refactor memory crate
}
}

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