Fix many errors.

kernel/src/arch/mipsel/board/malta/serial.rs

@@ -4,7 +4,7 @@ use core::fmt::{Write, Result, Arguments};
 use core::ptr::{read_volatile, write_volatile};
 use spin::Mutex;
 
-struct SerialPort {
+pub struct SerialPort {
     base: usize
 }
 
@@ -83,12 +83,12 @@ impl Write for SerialPort {
 
 fn write<T>(addr: usize, content: T) {
     let cell = (addr) as *mut T;
-    write_volatile(cell, content);
+    unsafe { write_volatile(cell, content) }
 }
 
 fn read<T>(addr: usize) -> T {
     let cell = (addr) as *const T;
-    read_volatile(cell)
+    unsafe { read_volatile(cell) }
 }
 
 
@@ -119,4 +119,4 @@ lazy_static! {
 
 pub fn init(base: usize) {
     SERIAL_PORT.lock().init(base);
-}
+}

kernel/src/arch/mipsel/boot/trap.S

@@ -156,3 +156,11 @@ kernel_stack:
     .space 1024 * 16 # 16KB for kernel stack
     .global kernel_stack_top
 kernel_stack_top:
+
+    .align 12  #PGSHIFT
+    .global root_page_table_buffer
+root_page_table_buffer:
+    .space 1024 * 4 # 4KB
+    .global root_page_table_ptr
+root_page_table_ptr:
+    .space 4 # 4bytes

kernel/src/arch/mipsel/context.rs

@@ -1,5 +1,8 @@
 use mips::registers::cp0;
-use crate::arch::paging::root_page_table_ptr;
+
+extern {
+    static root_page_table_ptr : *mut usize;
+}
 
 /// Saved registers on a trap.
 #[derive(Clone)]
@@ -206,7 +209,7 @@ impl Context {
         Store zero, 0(a1)
         jr ra
         nop"
-        :"=r"(root_page_table_ptr) :"r"(root_page_table_ptr) : : "volatile" )
+        :"=r"(*root_page_table_ptr) :"r"(*root_page_table_ptr) : : "volatile" )
     }
 
     /// Constructs a null Context for the current running thread.

kernel/src/arch/mipsel/paging.rs

@@ -49,14 +49,15 @@ impl PageTable for ActivePageTable {
 impl PageTableExt for ActivePageTable {}
 
 /// The virtual address of root page table
-static ROOT_PAGE_TABLE_BUFFER: MIPSPageTable = ::core::mem::uninitialized();
-pub static mut root_page_table_ptr: usize =
-    &ROOT_PAGE_TABLE_BUFFER as *const MIPSPageTable as usize;
+extern {
+    static root_page_table_buffer : *mut MIPSPageTable;
+    static root_page_table_ptr : *mut usize;
+}
 
 impl ActivePageTable {
     pub unsafe fn new() -> Self {
         ActivePageTable(
-            TwoLevelPageTable::new(&mut ROOT_PAGE_TABLE_BUFFER),
+            TwoLevelPageTable::new(&mut *(root_page_table_buffer as *mut MIPSPageTable)),
             ::core::mem::uninitialized()
         )
     }
@@ -119,11 +120,11 @@ impl InactivePageTable for InactivePageTable0 {
     }
 
     unsafe fn set_token(token: usize) {
-        root_page_table_ptr = token;
+        *root_page_table_ptr = token;
     }
 
     fn active_token() -> usize {
-        root_page_table_ptr
+        unsafe { *root_page_table_ptr }
     }
 
     fn flush_tlb() {
@@ -131,11 +132,16 @@ impl InactivePageTable for InactivePageTable0 {
     }
 
     fn edit<T>(&mut self, f: impl FnOnce(&mut Self::Active) -> T) -> T {
-        let pt: *mut MIPSPageTable = self.token() as *mut MIPSPageTable;
-        let active = ActivePageTable(
+        let pt: *mut MIPSPageTable = unsafe {
+            self.token() as *mut MIPSPageTable
+        };
+
+        let mut active = unsafe {
+            ActivePageTable(
                 TwoLevelPageTable::new(&mut *pt),
                 ::core::mem::uninitialized()
-            );
+            )
+        };
         f(&mut active)
     }
 }

kernel/src/backtrace.rs

@@ -22,6 +22,10 @@ pub fn fp() -> usize {
     unsafe {
         asm!("mov %rbp, $0" : "=r"(ptr));
     }
+    #[cfg(any(target_arch = "mips"))]
+    unsafe {
+        asm!("mov $0, fp" : "=r"(ptr));
+    }
 
     ptr
 }
@@ -34,7 +38,9 @@ pub fn lr() -> usize {
     unsafe {
         asm!("mov $0, x30" : "=r"(ptr));
     }
-    #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
+    #[cfg(any(target_arch = "riscv32",
+              target_arch = "riscv64",
+              target_arch = "mips"))]
     unsafe {
         asm!("mv $0, ra" : "=r"(ptr));
     }