From 50a8de35bca7f4373610817338e46ce732f6811a Mon Sep 17 00:00:00 2001 From: equation314 Date: Wed, 27 Feb 2019 14:49:32 +0800 Subject: [PATCH] aarch64: save current TTBR1_EL1 in context switch fixed a bug: when the context switch occurs in InactivePageTable::edit() or InactivePageTable::with() which modify TTBR1_EL1 temporarily, TTBR1_EL1 can be restored to the unmodified value after context switch. --- kernel/src/arch/aarch64/interrupt/context.rs | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/kernel/src/arch/aarch64/interrupt/context.rs b/kernel/src/arch/aarch64/interrupt/context.rs index 0d6502c..ab24ecf 100644 --- a/kernel/src/arch/aarch64/interrupt/context.rs +++ b/kernel/src/arch/aarch64/interrupt/context.rs @@ -5,7 +5,7 @@ use lazy_static::lazy_static; use aarch64::barrier; use aarch64::addr::PhysAddr; use aarch64::paging::PhysFrame; -use aarch64::asm::{tlb_invalidate_all, ttbr_el1_write_asid}; +use aarch64::asm::{tlb_invalidate_all, ttbr_el1_read, ttbr_el1_write_asid}; #[repr(C)] #[derive(Default, Debug, Copy, Clone)] @@ -127,6 +127,7 @@ impl Context { } pub unsafe fn switch(&mut self, target: &mut Self) { + self.ttbr = ttbr_el1_read(1); target.asid = ASID_ALLOCATOR.lock().alloc(target.asid); // with ASID we needn't flush TLB frequently