From 8ed6822636a5807be34d97257683e6de812fc6ab Mon Sep 17 00:00:00 2001
From: Yuhao Zhou <miskcoo@gmail.com>
Date: Sat, 6 Apr 2019 00:04:56 +0800
Subject: [PATCH] Move context switch to context.S

---
 kernel/src/arch/mipsel/boot/context.S | 54 +++++++++++++++++++++++++++
 kernel/src/arch/mipsel/context.rs     | 52 +-------------------------
 2 files changed, 55 insertions(+), 51 deletions(-)
 create mode 100644 kernel/src/arch/mipsel/boot/context.S

diff --git a/kernel/src/arch/mipsel/boot/context.S b/kernel/src/arch/mipsel/boot/context.S
new file mode 100644
index 0000000..de94380
--- /dev/null
+++ b/kernel/src/arch/mipsel/boot/context.S
@@ -0,0 +1,54 @@
+#include "regdef.h"
+
+.set noat
+.set noreorder
+
+// .section .text.context
+.globl switch_context
+.extern root_page_table_ptr
+
+switch_context:
+	// save from's registers
+	addi  sp, sp, (-4*14)
+	sw sp, 0(a0)
+	sw ra, 0(sp)
+	sw s0, 2*4(sp)
+	sw s1, 3*4(sp)
+	sw s2, 4*4(sp)
+	sw s3, 5*4(sp)
+	sw s4, 6*4(sp)
+	sw s5, 7*4(sp)
+	sw s6, 8*4(sp)
+	sw s7, 9*4(sp)
+	sw s8, 10*4(sp)
+	sw gp, 11*4(sp)
+	sw ra, 12*4(sp)
+	sw sp, 13*4(sp)
+
+	la s0, root_page_table_ptr
+	lw at, 0(s0)
+	sw at, 4(sp)
+
+	// restore to's registers
+	lw sp, 0(a1)
+	lw at, 4(sp)
+	sw at, 0(s0)
+
+	lw ra, 0(sp)
+	lw s0, 2*4(sp)
+	lw s1, 3*4(sp)
+	lw s2, 4*4(sp)
+	lw s3, 5*4(sp)
+	lw s4, 6*4(sp)
+	lw s5, 7*4(sp)
+	lw s6, 8*4(sp)
+	lw s7, 9*4(sp)
+	lw s8, 10*4(sp)
+	lw gp, 11*4(sp)
+	lw ra, 12*4(sp)
+	lw sp, 13*4(sp)
+	addi sp, sp, (4*14)
+
+	sw zero, 0(a1)
+	jr ra
+	nop
diff --git a/kernel/src/arch/mipsel/context.rs b/kernel/src/arch/mipsel/context.rs
index bb3dba4..c44509c 100644
--- a/kernel/src/arch/mipsel/context.rs
+++ b/kernel/src/arch/mipsel/context.rs
@@ -159,57 +159,7 @@ impl Context {
     #[naked]
     #[inline(never)]
     pub unsafe extern fn switch(&mut self, _target: &mut Self) {
-        asm!(r"
-        .equ XLENB, 4
-        .macro Load reg, mem
-            lw \reg, \mem
-        .endm
-        .macro Store reg, mem
-            sw \reg, \mem
-        .endm");
-        asm!("
-        // save from's registers
-        addi  sp, sp, (-XLENB*14)
-        Store sp, 0(a0)
-        Store ra, 0*XLENB(sp)
-        Store s0, 2*XLENB(sp)
-        Store s1, 3*XLENB(sp)
-        Store s2, 4*XLENB(sp)
-        Store s3, 5*XLENB(sp)
-        Store s4, 6*XLENB(sp)
-        Store s5, 7*XLENB(sp)
-        Store s6, 8*XLENB(sp)
-        Store s7, 9*XLENB(sp)
-        Store s8, 10*XLENB(sp)
-        Store gp, 11*XLENB(sp)
-        Store ra, 12*XLENB(sp)
-        Store sp, 13*XLENB(sp)
-
-        Store $1, 1*XLENB(sp)
-
-        // restore to's registers
-        Load sp, 0(a1)
-        Load $0, 1*XLENB(sp)
-
-        Load ra, 0*XLENB(sp)
-        Load s0, 2*XLENB(sp)
-        Load s1, 3*XLENB(sp)
-        Load s2, 4*XLENB(sp)
-        Load s3, 5*XLENB(sp)
-        Load s4, 6*XLENB(sp)
-        Load s5, 7*XLENB(sp)
-        Load s6, 8*XLENB(sp)
-        Load s7, 9*XLENB(sp)
-        Load s8, 10*XLENB(sp)
-        Load gp, 11*XLENB(sp)
-        Load ra, 12*XLENB(sp)
-        Load sp, 13*XLENB(sp)
-        addi sp, sp, (XLENB*14)
-
-        Store zero, 0(a1)
-        jr ra
-        nop"
-        :"=r"(*root_page_table_ptr) :"r"(*root_page_table_ptr) : : "volatile" )
+        asm!(include_str!("boot/context.S"));
     }
 
     /// Constructs a null Context for the current running thread.