diff --git a/kernel/src/arch/mipsel/boot/context.S b/kernel/src/arch/mipsel/boot/context.S
index 557776b..534ede5 100644
--- a/kernel/src/arch/mipsel/boot/context.S
+++ b/kernel/src/arch/mipsel/boot/context.S
@@ -28,13 +28,13 @@ switch_context:
 
 	// save page table address
 	la s0, _root_page_table_ptr
-	lw AT, 0(s0)
-	sw AT, 4(sp)
+	lw s1, 0(s0)
+	sw s1, 4(sp)
 
 	// restore to's registers
 	lw sp, 0(a1)
-	lw AT, 4(sp)
-	sw AT, 0(s0)
+	lw s1, 4(sp)
+	sw s1, 0(s0)
 
 	// restore kstack ptr
 	// la s0, _cur_kstack_ptr
diff --git a/kernel/src/arch/mipsel/boot/entry.S b/kernel/src/arch/mipsel/boot/entry.S
index 4bbdc35..0e45ba7 100644
--- a/kernel/src/arch/mipsel/boot/entry.S
+++ b/kernel/src/arch/mipsel/boot/entry.S
@@ -17,9 +17,9 @@ _start:
 
     # set ebase
     la    t0, trap_entry
-    mfc0  t1, $15 # C0_EBASE
+    mfc0  t1, $15, 1 # C0_EBASE
     or    t1, t1, t0
-    mtc0  t1, $15
+    mtc0  t1, $15, 1
 
     # exit bootstrap mode
     mfc0  t0, $12 # C0_STATUS
diff --git a/kernel/src/arch/mipsel/context.rs b/kernel/src/arch/mipsel/context.rs
index 19b4af1..7e473ad 100644
--- a/kernel/src/arch/mipsel/context.rs
+++ b/kernel/src/arch/mipsel/context.rs
@@ -118,7 +118,7 @@ impl InitStack {
     }
 }
 
-extern {
+extern "C" {
     fn trap_return();
 }
 
@@ -161,8 +161,7 @@ impl Context {
             fn switch_context(src: *mut Context, dst: *mut Context);
         }
 
-        info!("Switch to {:x}", target.sp);
-
+        tlb::clear_all_tlb();
         switch_context(self as *mut Context, target as *mut Context);
     }
 
@@ -230,7 +229,7 @@ impl Context {
                 let mut tf = tf.clone();
                 tf.sp = ustack_top;   // sp
                 tf.v1 = tls;
-                tf.a0 = 0;  // return value
+                tf.v0 = 0;  // return value
                 tf
             },
         }.push_at(kstack_top)
diff --git a/kernel/src/arch/mipsel/paging.rs b/kernel/src/arch/mipsel/paging.rs
index 47c2899..3771598 100644
--- a/kernel/src/arch/mipsel/paging.rs
+++ b/kernel/src/arch/mipsel/paging.rs
@@ -51,6 +51,7 @@ extern "C" {
 
 pub fn set_root_page_table_ptr(ptr : usize) {
     unsafe {
+        clear_all_tlb();
         *(_root_page_table_ptr as *mut usize) = ptr;
     }
 }
@@ -157,13 +158,19 @@ impl InactivePageTable for InactivePageTable0 {
             self.token() as *mut MIPSPageTable
         };
 
+        unsafe { clear_all_tlb(); } 
+
         let mut active = unsafe {
             ActivePageTable(
                 TwoLevelPageTable::new(&mut *pt),
                 ::core::mem::uninitialized()
             )
         };
-        f(&mut active)
+
+        let ret = f(&mut active);
+
+        unsafe { clear_all_tlb(); }
+        ret
     }
 }
 
diff --git a/kernel/src/arch/mipsel/timer.rs b/kernel/src/arch/mipsel/timer.rs
index 9659358..fdc6ecf 100644
--- a/kernel/src/arch/mipsel/timer.rs
+++ b/kernel/src/arch/mipsel/timer.rs
@@ -19,7 +19,6 @@ pub fn init() {
 pub fn set_next() {
     // 100Hz @ QEMU
     let timebase = 250000;
-    cp0::compare::write_u32(
-        cp0::count::read_u32() + timebase
-    );
+    cp0::count::write_u32(0);
+    cp0::compare::write_u32(timebase);
 }