From 610fd5b3db221e86105add28e1e90bb59111dd41 Mon Sep 17 00:00:00 2001 From: Yuhao Zhou Date: Sat, 6 Apr 2019 01:01:10 +0800 Subject: [PATCH] Fix MIPS registers access in backtrace.rs. --- kernel/src/arch/mipsel/context.rs | 3 +-- kernel/src/backtrace.rs | 6 +++--- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/kernel/src/arch/mipsel/context.rs b/kernel/src/arch/mipsel/context.rs index 1a53b7d..000b106 100644 --- a/kernel/src/arch/mipsel/context.rs +++ b/kernel/src/arch/mipsel/context.rs @@ -156,8 +156,7 @@ impl Context { /// Push all callee-saved registers at the current kernel stack. /// Store current sp, switch to target. /// Pop all callee-saved registers, then return to the target. - #[naked] - #[inline(never)] + #[inline(always)] pub unsafe extern fn switch(&mut self, _target: &mut Self) { extern { fn switch_context(src : &mut Context, dst : &mut Context); diff --git a/kernel/src/backtrace.rs b/kernel/src/backtrace.rs index 5d84f7f..8d6c178 100644 --- a/kernel/src/backtrace.rs +++ b/kernel/src/backtrace.rs @@ -24,8 +24,8 @@ pub fn fp() -> usize { } #[cfg(any(target_arch = "mips"))] unsafe { - // fp = $30 - asm!("ori $0, $$$30, 0" : "=r"(ptr)); + // fp = s8 = $30 + asm!("ori $0, $$$1, 0" : "=r"(ptr): "i"(30)); } ptr @@ -51,7 +51,7 @@ pub fn lr() -> usize { #[cfg(target_arch = "mips")] unsafe { - asm!("ori $0, $$$31, 0" : "=r"(ptr)); + asm!("ori $0, $$$1, 0" : "=r"(ptr) : "i"(31)); } ptr