diff --git a/kernel/Cargo.lock b/kernel/Cargo.lock index 9f3cb58..6c6b307 100644 --- a/kernel/Cargo.lock +++ b/kernel/Cargo.lock @@ -307,7 +307,7 @@ dependencies = [ [[package]] name = "riscv" version = "0.3.0" -source = "git+https://github.com/riscv-and-rust-and-decaf/riscv#f6f475e35b36717cf4455e298e4468773a57eb84" +source = "git+https://github.com/riscv-and-rust-and-decaf/riscv#ac09fc675387998df9874349fd9794aced81185c" dependencies = [ "bare-metal 0.2.4 (registry+https://github.com/rust-lang/crates.io-index)", "bit_field 0.9.0 (registry+https://github.com/rust-lang/crates.io-index)", diff --git a/kernel/Cargo.toml b/kernel/Cargo.toml index b02f003..36ad8af 100644 --- a/kernel/Cargo.toml +++ b/kernel/Cargo.toml @@ -19,6 +19,9 @@ authors = [ no_mmu = [] # Kernel in M-mode (for riscv) m_mode = ["no_mmu"] +# Page table sv39 or sv48 (for riscv64) +sv39 = [] +board_u540 = ["sv39"] # (for aarch64 RaspberryPi3) nographic = [] board_raspi3 = ["bcm2837"] diff --git a/kernel/Makefile b/kernel/Makefile index b344fcb..fbe27b6 100644 --- a/kernel/Makefile +++ b/kernel/Makefile @@ -124,7 +124,12 @@ endif ifdef m_mode features += no_mmu m_mode -bbl_m_mode := --enable-boot-machine +riscv_pk_args := --enable-boot-machine +endif + +ifeq ($(board), u540) +features += sv39 +riscv_pk_args += --enable-sv39 endif ifneq ($(board), none) @@ -210,7 +215,7 @@ ifeq ($(arch), riscv32) @mkdir -p target/$(target)/bbl && \ cd target/$(target)/bbl && \ $(bbl_path)/configure \ - $(bbl_m_mode) \ + $(riscv_pk_args) \ --with-arch=rv32imac \ --disable-fp-emulation \ --host=riscv64-unknown-elf \ @@ -224,7 +229,7 @@ else @mkdir -p target/$(target)/bbl && \ cd target/$(target)/bbl && \ $(bbl_path)/configure \ - $(bbl_m_mode) \ + $(riscv_pk_args) \ --with-arch=rv64imac \ --disable-fp-emulation \ --host=riscv64-unknown-elf \ diff --git a/kernel/build-rv64 b/kernel/build-rv64 index eb91e79..b4d467f 100755 --- a/kernel/build-rv64 +++ b/kernel/build-rv64 @@ -553,7 +553,7 @@ fi CNAME=riscv if ! [[ -f ${OUTDIR}/${CNAME}.o ]] then -rustc --crate-name riscv $CARGO_PATH/git/checkouts/riscv-1e845b622ce46f1d/f6f475e*/src/lib.rs \ +rustc --crate-name riscv $CARGO_PATH/git/checkouts/riscv-1e845b622ce46f1d/ac09fc6*/src/lib.rs \ --color always --crate-type lib --emit=metadata,llvm-bc \ -C opt-level=1 \ -C debuginfo=2 \ @@ -605,6 +605,9 @@ CNAME=rcore if [[ ${board} = k210 ]]; then export UCORE_FEATURE_ARGS='--cfg feature="m_mode" --cfg feature="no_mmu" --cfg feature="board_k210"' cp src/arch/riscv32/board/k210/linker.ld src/arch/riscv32/boot/linker64.ld +elif [[ ${board} = u540 ]]; then + export UCORE_FEATURE_ARGS='--cfg feature="sv39" --cfg feature="board_u540"' + cp src/arch/riscv32/board/u540/linker.ld src/arch/riscv32/boot/linker64.ld else cp src/arch/riscv32/board/u540/linker.ld src/arch/riscv32/boot/linker64.ld fi diff --git a/kernel/src/arch/riscv32/paging.rs b/kernel/src/arch/riscv32/paging.rs index adf71ad..86a2380 100644 --- a/kernel/src/arch/riscv32/paging.rs +++ b/kernel/src/arch/riscv32/paging.rs @@ -3,7 +3,7 @@ use crate::consts::RECURSIVE_INDEX; use crate::memory::{active_table, alloc_frame, dealloc_frame}; use riscv::addr::*; use riscv::asm::{sfence_vma, sfence_vma_all}; -use riscv::paging::{Mapper, PageTable as RvPageTable, PageTableEntry, PageTableFlags as EF, RecursivePageTable}; +use riscv::paging::{Mapper, PageTable as RvPageTable, PageTableEntry, PageTableFlags as EF, RecursivePageTable, PageTableType}; use riscv::paging::{FrameAllocator, FrameDeallocator}; use riscv::register::satp; use rcore_memory::paging::*; @@ -58,7 +58,14 @@ impl PageTableExt for ActivePageTable {} const ROOT_PAGE_TABLE: *mut RvPageTable = ((RECURSIVE_INDEX << 12 << 10) | ((RECURSIVE_INDEX+1) << 12)) as *mut RvPageTable; -#[cfg(target_arch = "riscv64")] +#[cfg(all(target_arch = "riscv64", feature = "sv39"))] +const ROOT_PAGE_TABLE: *mut RvPageTable = + ((0xFFFF_0000_0000_0000) | + (0o777 << 12 << 9 << 9 << 9) | + (RECURSIVE_INDEX << 12 << 9 << 9) | + (RECURSIVE_INDEX << 12 << 9) | + ((RECURSIVE_INDEX+1) << 12)) as *mut RvPageTable; +#[cfg(all(target_arch = "riscv64", not(feature = "sv39")))] const ROOT_PAGE_TABLE: *mut RvPageTable = ((0xFFFF_0000_0000_0000) | (RECURSIVE_INDEX << 12 << 9 << 9 << 9) | @@ -67,12 +74,24 @@ const ROOT_PAGE_TABLE: *mut RvPageTable = ((RECURSIVE_INDEX+1) << 12)) as *mut RvPageTable; impl ActivePageTable { + #[cfg(target_arch = "riscv32")] pub unsafe fn new() -> Self { ActivePageTable( RecursivePageTable::new(&mut *ROOT_PAGE_TABLE).unwrap(), ::core::mem::uninitialized() ) } + #[cfg(target_arch = "riscv64")] + pub unsafe fn new() -> Self { + #[cfg(feature = "sv39")] + let type_ = PageTableType::Sv39; + #[cfg(not(feature = "sv39"))] + let type_ = PageTableType::Sv48; + ActivePageTable( + RecursivePageTable::new(&mut *ROOT_PAGE_TABLE, type_).unwrap(), + ::core::mem::uninitialized() + ) + } } /// implementation for the Entry trait in /crate/memory/src/paging/mod.rs @@ -177,7 +196,10 @@ impl InactivePageTable for InactivePageTable0 { use bit_field::BitField; let mut satp = self.root_frame.number(); satp.set_bits(44..60, 0); // AS is 0 - satp.set_bits(60..64, satp::Mode::Sv48 as usize); // Mode is Sv48 + #[cfg(feature = "sv39")] + satp.set_bits(60..64, satp::Mode::Sv39 as usize); + #[cfg(not(feature = "sv39"))] + satp.set_bits(60..64, satp::Mode::Sv48 as usize); satp } diff --git a/riscv-pk b/riscv-pk index e309fff..e216edb 160000 --- a/riscv-pk +++ b/riscv-pk @@ -1 +1 @@ -Subproject commit e309fff977870e7596f87788c891dfd393fd5296 +Subproject commit e216edbf9898b5bdb5c3b2c1fe6c0df00c8a7ba9