From ba8f9370ba240b6f2ec9615c0687fa8d25be3116 Mon Sep 17 00:00:00 2001 From: Jiajie Chen Date: Sun, 12 May 2019 01:46:55 +0800 Subject: [PATCH] Remove rv48 support, for it has no use and it's easy to add back when necessary --- kernel/Cargo.toml | 10 ++++------ kernel/src/arch/riscv32/paging.rs | 9 +++------ 2 files changed, 7 insertions(+), 12 deletions(-) diff --git a/kernel/Cargo.toml b/kernel/Cargo.toml index b5e3019..ba20cf9 100644 --- a/kernel/Cargo.toml +++ b/kernel/Cargo.toml @@ -19,12 +19,10 @@ authors = [ ] [features] -default = ["sv39"] -# Page table sv39 or sv48 (for riscv64) -sv39 = [] -board_u540 = ["sv39", "link_user"] -board_k210 = ["sv39", "link_user"] -board_rocket_chip = ["sv39", "link_user"] +default = [] +board_u540 = ["link_user"] +board_k210 = ["link_user"] +board_rocket_chip = ["link_user"] # (for aarch64 RaspberryPi3) nographic = [] board_raspi3 = ["bcm2837", "link_user"] diff --git a/kernel/src/arch/riscv32/paging.rs b/kernel/src/arch/riscv32/paging.rs index 62de63a..b6bdabe 100644 --- a/kernel/src/arch/riscv32/paging.rs +++ b/kernel/src/arch/riscv32/paging.rs @@ -13,10 +13,8 @@ use riscv::register::satp; #[cfg(target_arch = "riscv32")] type TopLevelPageTable<'a> = riscv::paging::Rv32PageTable<'a>; -#[cfg(all(target_arch = "riscv64", feature = "sv39"))] +#[cfg(target_arch = "riscv64")] type TopLevelPageTable<'a> = riscv::paging::Rv39PageTable<'a>; -#[cfg(all(target_arch = "riscv64", not(feature = "sv39")))] -type TopLevelPageTable<'a> = riscv::paging::Rv48PageTable<'a>; pub struct PageTableImpl { page_table: TopLevelPageTable<'static>, @@ -191,20 +189,19 @@ impl PageTableExt for PageTableImpl { let frame = Frame::of_addr(PhysAddr::new((i << 22) - PHYSICAL_MEMORY_OFFSET)); table[i].set(frame, flags); } - #[cfg(all(target_arch = "riscv64", feature = "sv39"))] + #[cfg(target_arch = "riscv64")] for i in 509..512 { let flags = EF::VALID | EF::READABLE | EF::WRITABLE | EF::EXECUTABLE | EF::ACCESSED | EF::DIRTY; let frame = Frame::of_addr(PhysAddr::new((0xFFFFFF80_00000000 + (i << 30)) - PHYSICAL_MEMORY_OFFSET)); table[i].set(frame, flags); } - // TODO: sv48 } fn token(&self) -> usize { #[cfg(target_arch = "riscv32")] return self.root_frame.number() | (1 << 31); - #[cfg(all(target_arch = "riscv64", feature = "sv39"))] + #[cfg(target_arch = "riscv64")] return self.root_frame.number() | (8 << 60); }