diff --git a/kernel/run-qemu-script-custom-llc b/kernel/run-qemu-script-custom-llc
index bdc8f04..ddc017a 100755
--- a/kernel/run-qemu-script-custom-llc
+++ b/kernel/run-qemu-script-custom-llc
@@ -25,7 +25,7 @@ if [[ ${RV32} = 1 ]]; then
 	UCORE_USER_IMAGE="../user/img/ucore-rv32.img"
 else
 	TARGET_ARCH=riscv64
-	export LOG=trace
+	export LOG=warn
 	COMPILER_RT_CFLAGS="-march=rv64ia -mabi=lp64 -O3"
 	SFSIMG_CFLAGS="-march=rv64ia -mabi=lp64"
 	RISCV_PK_CONFIGURE_FLAGS="--with-arch=rv64imac --disable-fp-emulation --host=riscv64-unknown-elf"
diff --git a/kernel/src/arch/riscv32/memory.rs b/kernel/src/arch/riscv32/memory.rs
index 867f011..a56e249 100644
--- a/kernel/src/arch/riscv32/memory.rs
+++ b/kernel/src/arch/riscv32/memory.rs
@@ -91,7 +91,7 @@ fn remap_the_kernel() {
 
 #[cfg(all(target_arch = "riscv64", not(feature = "no_mmu")))]
 fn remap_the_kernel() {
-    info!("remap the kernel begin, satp: {:x}", satp::read().bits());
+    error!("remap the kernel begin, satp: {:x}", satp::read().bits());
     let mut ms = MemorySet::new_bare();
     info!("ms new bare");
     #[cfg(feature = "no_bbl")]
@@ -111,7 +111,7 @@ fn remap_the_kernel() {
     unsafe { SATP = ms.token(); }
     info!("satp token ok");
     mem::forget(ms);
-    info!("kernel remap end");
+    error!("kernel remap end");
 }
 
 // First core stores its SATP here.
diff --git a/kernel/src/arch/riscv32/paging.rs b/kernel/src/arch/riscv32/paging.rs
index 9d6d9ff..7795c0a 100644
--- a/kernel/src/arch/riscv32/paging.rs
+++ b/kernel/src/arch/riscv32/paging.rs
@@ -281,16 +281,11 @@ impl ActivePageTable {
 
 /// implementation for the Entry trait in /crate/memory/src/paging/mod.rs
 impl Entry for PageEntry {
+    // TODO: merge below two
     #[cfg(target_arch = "riscv64")]
     fn update(&mut self) {
-        assert!(false, "can't update");
-        let mut addr: usize = (self as *const _ as usize) << 9;
-        if (addr & 0x7000_0000_0000 != 0) {
-            addr |= 0xFFFF_0000_0000_0000;
-        } else {
-            addr &= 0x0000_FFFF_FFFF_FFFF;
-        }
-        sfence_vma(0, VirtAddr::new(addr));
+        edit_entry_of(&self.1, |entry| *entry = self.0);
+        sfence_vma(0, self.1.start_address());
     }
     #[cfg(target_arch = "riscv32")]
     fn update(&mut self) {