From d6a54496f0aaa479ae06ac0b80a7d85f98dc17ae Mon Sep 17 00:00:00 2001
From: equation314 <equation618@gmail.com>
Date: Sat, 1 Dec 2018 19:43:49 +0800
Subject: [PATCH] arch64/mmu: invalidate all icaches in
 InactivePageTable::with()

---
 crate/aarch64/src/asm.rs          | 12 ++++++++++++
 kernel/src/arch/aarch64/paging.rs |  3 ++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/crate/aarch64/src/asm.rs b/crate/aarch64/src/asm.rs
index 4cd37d7..bada049 100644
--- a/crate/aarch64/src/asm.rs
+++ b/crate/aarch64/src/asm.rs
@@ -105,6 +105,18 @@ pub fn tlb_invalidate(vaddr: VirtAddr) {
     }
 }
 
+/// Invalidate all instruction caches in Inner Shareable domain to Point of Unification.
+#[inline(always)]
+pub fn flush_icache_all() {
+    unsafe {
+        asm!(
+            "ic ialluis
+             dsb ish
+             isb"
+        );
+    }
+}
+
 /// Address Translate.
 #[inline(always)]
 pub fn address_translate(vaddr: usize) -> usize {
diff --git a/kernel/src/arch/aarch64/paging.rs b/kernel/src/arch/aarch64/paging.rs
index 0093385..0b7546e 100644
--- a/kernel/src/arch/aarch64/paging.rs
+++ b/kernel/src/arch/aarch64/paging.rs
@@ -5,7 +5,7 @@ use memory::{active_table, alloc_frame, alloc_stack, dealloc_frame};
 use ucore_memory::memory_set::*;
 use ucore_memory::PAGE_SIZE;
 use ucore_memory::paging::*;
-use aarch64::asm::{tlb_invalidate, tlb_invalidate_all, ttbr_el1_read, ttbr_el1_write};
+use aarch64::asm::{tlb_invalidate, tlb_invalidate_all, flush_icache_all, ttbr_el1_read, ttbr_el1_write};
 use aarch64::{PhysAddr, VirtAddr};
 use aarch64::paging::{Mapper, PageTable as Aarch64PageTable, PageTableEntry, PageTableFlags as EF, RecursivePageTable};
 use aarch64::paging::{FrameAllocator, FrameDeallocator, Page, PhysFrame as Frame, Size4KiB, Size2MiB, Size1GiB};
@@ -246,6 +246,7 @@ impl InactivePageTable for InactivePageTable0 {
         if old_frame != new_frame {
             ttbr_el1_write(1, old_frame);
             tlb_invalidate_all();
+            flush_icache_all();
         }
     }