Add interrupt for mips32 in crate::thread.

crate/thread/src/interrupt.rs

@@ -61,3 +61,32 @@ pub unsafe fn restore(flags: usize) {
 pub unsafe fn enable_and_wfi() {
     asm!("msr daifclr, #2; wfi" :::: "volatile");
 }
+
+#[inline(always)]
+#[cfg(target_arch = "mips")]
+pub unsafe fn disable_and_store() -> usize {
+    let cp0_status: usize;
+    asm!("mfc0 $0, $$12;" : "=r"(cp0_status) ::: "volatile");
+    let cp0_status_new = cp0_status & !1;
+    asm!("mtc0 $0, $$12;" : : "r"(cp0_status_new) :: "volatile");
+    cp0_status & 1
+}
+
+#[inline(always)]
+#[cfg(target_arch = "mips")]
+pub unsafe fn restore(flags: usize) {
+    let cp0_status: usize;
+    asm!("mfc0 $0, $$12;" : "=r"(cp0_status) ::: "volatile");
+    let cp0_status_new = cp0_status | flags;
+    asm!("mtc0 $0, $$12;" : : "r"(cp0_status_new) :: "volatile");
+}
+
+#[inline(always)]
+#[cfg(target_arch = "mips")]
+pub unsafe fn enable_and_wfi() {
+    let cp0_status: usize;
+    asm!("mfc0 $0, $$12;" : "=r"(cp0_status) ::: "volatile");
+    let cp0_status_new = cp0_status | 1;
+    asm!("mtc0 $0, $$12; wait;" : : "r"(cp0_status_new) :: "volatile");
+}
+

kernel/build.rs

@@ -18,6 +18,8 @@ fn main() {
 		}
 		"riscv64" => {
 		}
+		"mipsel" => {
+		}
 		"aarch64" => {
 		}
 		_ => panic!("Unknown arch {}", arch),

kernel/src/arch/mipsel/mod.rs

@@ -1,5 +1,5 @@
 pub mod io;
-pub mod interrupt;
+//pub mod interrupt;
 pub mod timer;
 pub mod paging;
 pub mod memory;

kernel/src/lib.rs

@@ -41,6 +41,10 @@ mod backtrace;
 #[path = "arch/x86_64/mod.rs"]
 pub mod arch;
 
+#[cfg(target_arch = "mipsel")]
+#[path = "arch/mipsel/mod.rs"]
+pub mod arch;
+
 #[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
 #[path = "arch/riscv32/mod.rs"]
 pub mod arch;