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80 lines
1.6 KiB
80 lines
1.6 KiB
pub mod io;
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pub mod interrupt;
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pub mod timer;
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pub mod paging;
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pub mod memory;
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pub mod compiler_rt;
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pub mod consts;
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pub mod cpu;
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pub mod syscall;
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pub mod rand;
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pub mod driver;
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use log::*;
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use mips::registers::cp0;
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use mips::instructions;
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#[cfg(feature = "board_malta")]
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#[path = "board/malta/mod.rs"]
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pub mod board;
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#[cfg(feature = "board_thinpad")]
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#[path = "board/thinpad/mod.rs"]
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pub mod board;
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extern "C" {
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fn _dtb_start();
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fn _dtb_end();
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}
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#[no_mangle]
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pub extern fn rust_main() -> ! {
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// unsafe { cpu::set_cpu_id(hartid); }
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let ebase = cp0::ebase::read_u32();
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let cpu_id = ebase & 0x3ff;
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let dtb_start = _dtb_start as usize;
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let dtb_end = _dtb_end as usize;
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if cpu_id != BOOT_CPU_ID {
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// TODO: run others_main on other CPU
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// while unsafe { !cpu::has_started(hartid) } { }
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// println!("Hello RISCV! in hart {}, dtb @ {:#x}", hartid, dtb);
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// others_main();
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loop {}
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}
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unsafe { memory::clear_bss(); }
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board::init_serial_early();
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driver::init();
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println!("Hello MIPS 32 from CPU {}, dtb @ {:#x}", cpu_id, dtb_start);
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interrupt::init();
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memory::init();
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timer::init();
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crate::logging::init();
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crate::drivers::init(dtb_start);
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crate::process::init();
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// TODO: start other CPU
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// unsafe { cpu::start_others(hart_mask); }
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crate::kmain();
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}
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fn others_main() -> ! {
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interrupt::init();
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memory::init_other();
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timer::init();
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crate::kmain();
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}
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const BOOT_CPU_ID: usize = 0;
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global_asm!(include_str!("boot/entry.S"));
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global_asm!(include_str!("boot/trap.S"));
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global_asm!(include_str!("boot/dtb.S"));
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