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#ifndef INSTRUCTIONH
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#define INSTRUCTIONH
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#include "ir.h"
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#include "riscv.h"
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#include "regalloc.h"
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// 语句块，也使用标号标识
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// 必须挂靠在函数下，否则无法正常生成标号
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// 可以考虑转化到riscv basic block做数据流分析，预留接口
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class RiscvBasicBlock : public RiscvLabel {
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public:
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RiscvFunction *func_;
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std::vector<RiscvInstr *> instruction;
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int blockInd_; // 表示了各个block之间的顺序
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RiscvBasicBlock(std::string name, RiscvFunction *func, int blockInd)
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: RiscvLabel(Block, name), func_(func), blockInd_(blockInd) {
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func->addBlock(this);
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}
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RiscvBasicBlock(std::string name, int blockInd)
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: RiscvLabel(Block, name), func_(nullptr), blockInd_(blockInd) {}
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void addFunction(RiscvFunction *func) { func->addBlock(this); }
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std::string printname() { return name_; }
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// void addOutBlock(RiscvBasicBlock *bb) { inB.push_back(bb); }
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// void addInBlock(RiscvBasicBlock *bb) { outB.push_back(bb); }
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void deleteInstr(RiscvInstr *instr) {
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auto it = std::find(instruction.begin(), instruction.end(), instr);
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if (it != instruction.end())
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instruction.erase(
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std::remove(instruction.begin(), instruction.end(), instr),
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instruction.end());
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}
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void replaceInstr(RiscvInstr *oldinst, RiscvInstr *newinst) {}
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// 在全部指令后面加入
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void addInstrBack(RiscvInstr *instr) {
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if (instr == nullptr)
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return;
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instruction.push_back(instr);
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}
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// 在全部指令之前加入
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void addInstrFront(RiscvInstr *instr) {
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if (instr == nullptr)
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return;
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instruction.insert(instruction.begin(), instr);
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}
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void addInstrBefore(RiscvInstr *instr, RiscvInstr *dst) {
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if (instr == nullptr)
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return;
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auto it = std::find(instruction.begin(), instruction.end(), dst);
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if (it != instruction.end())
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instruction.insert(it, instr);
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else
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addInstrBack(instr);
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}
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void addInstrAfter(RiscvInstr *instr, RiscvInstr *dst) {
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if (instr == nullptr)
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return;
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auto it = std::find(instruction.begin(), instruction.end(), dst);
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if (it != instruction.end()) {
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if (next(it) == instruction.end())
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instruction.push_back(instr);
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else
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instruction.insert(next(it), instr);
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} else {
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addInstrBack(instr);
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}
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}
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std::string print();
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};
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// 传入寄存器编号以生成一条语句，
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// 上层由basic block整合
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class RiscvInstr {
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public:
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// 指令类型，除分支语句外，其他对应到riscv
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// 加立即数或者浮点加需要做区分
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enum InstrType {
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ADD = 0,
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ADDI,
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SUB,
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SUBI,
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MUL,
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DIV = 6,
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REM,
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FADD = 8,
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FSUB = 10,
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FMUL = 12,
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FDIV = 14,
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XOR = 16,
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XORI,
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AND,
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ANDI,
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OR,
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ORI,
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SW,
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LW,
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FSW = 30,
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FLW,
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ICMP,
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FCMP,
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PUSH,
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POP,
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CALL,
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RET,
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LI,
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MOV,
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FMV,
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FPTOSI,
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SITOFP,
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JMP,
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SHL,
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LSHR,
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ASHR,
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SHLI = 52,
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LSHRI,
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ASHRI,
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LA,
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ADDIW,
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BGT
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};
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const static std::map<InstrType, std::string> RiscvName;
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InstrType type_;
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RiscvBasicBlock *parent_;
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std::vector<RiscvOperand *> operand_;
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RiscvInstr(InstrType type, int op_nums);
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RiscvInstr(InstrType type, int op_nums, RiscvBasicBlock *bb);
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~RiscvInstr() = default;
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virtual std::string print() = 0;
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RiscvOperand *result_;
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void setOperand(int ind, RiscvOperand *val) {
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assert(ind >= 0 && ind < operand_.size());
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operand_[ind] = val;
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}
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void setResult(RiscvOperand *result) { result_ = result; }
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void removeResult() { result_ = nullptr; }
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// 消除一个操作数
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void removeOperand(int i) { operand_[i] = nullptr; }
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// 清除指令
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void clear() { operand_.clear(), removeResult(); }
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// 先操作数后返回值
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std::vector<RiscvOperand *> getOperandResult() {
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std::vector<RiscvOperand *> ans(operand_);
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if (result_ != nullptr)
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ans.push_back(result_);
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return ans;
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}
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RiscvOperand *getOperand(int i) const { return operand_[i]; }
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};
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// 二元指令
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class BinaryRiscvInst : public RiscvInstr {
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public:
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std::string print() override;
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BinaryRiscvInst() = default;
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// target = v1 op v2，后面接一个flag参数表示要不要加入到对应的basic block中
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BinaryRiscvInst(InstrType op, RiscvOperand *v1, RiscvOperand *v2,
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RiscvOperand *target, RiscvBasicBlock *bb, bool flag = 0)
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: RiscvInstr(op, 2, bb), word(flag) {
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setOperand(0, v1);
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setOperand(1, v2);
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setResult(target);
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this->parent_ = bb;
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// Optimize: 若立即数为0，则改用寄存器zero。
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if(v2->getType() == v2->IntImm && static_cast<RiscvConst*>(v2)->intval == 0){
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type_ = ADD;
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setOperand(1, getRegOperand("zero"));
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}
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}
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bool word;
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};
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// 一元指令
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class UnaryRiscvInst : public RiscvInstr {
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public:
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std::string print() override;
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UnaryRiscvInst() = default;
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// target = op v1，后面接一个flag参数表示要不要加入到对应的basic block中
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UnaryRiscvInst(InstrType op, RiscvOperand *v1, RiscvOperand *target,
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RiscvBasicBlock *bb, bool flag = 0)
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: RiscvInstr(op, 1, bb) {
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setOperand(0, v1);
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setResult(target);
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this->parent_ = bb;
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if (flag)
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this->parent_->addInstrBack(this);
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}
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};
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// 加入一个整型mov指令(LI)
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class MoveRiscvInst : public RiscvInstr {
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public:
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std::string print() override;
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MoveRiscvInst() = default;
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MoveRiscvInst(RiscvOperand *v1, int Imm, RiscvBasicBlock *bb, bool flag = 0)
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: RiscvInstr(InstrType::LI, 2, bb) {
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RiscvOperand *Const = new RiscvConst(Imm);
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setOperand(0, v1);
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setOperand(1, Const);
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this->parent_ = bb;
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if (flag)
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this->parent_->addInstrBack(this);
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}
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// v2->v1
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MoveRiscvInst(RiscvOperand *v1, RiscvOperand *v2, RiscvBasicBlock *bb,
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bool flag = 0)
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: RiscvInstr(InstrType::MOV, 2, bb) {
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setOperand(0, v1);
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setOperand(1, v2);
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this->parent_ = bb;
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if (flag)
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this->parent_->addInstrBack(this);
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}
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};
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// 注意压栈顺序问题！打印的时候严格按照lists内顺序
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class PushRiscvInst : public RiscvInstr {
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int basicShift_;
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public:
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PushRiscvInst(std::vector<RiscvOperand *> &lists, RiscvBasicBlock *bb,
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int basicShift)
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: RiscvInstr(InstrType::PUSH, lists.size(), bb), basicShift_(basicShift) {
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for (int i = 0; i < lists.size(); i++)
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setOperand(i, lists[i]);
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}
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std::string print() override;
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};
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// 打印的时候严格按照lists内顺序
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class PopRiscvInst : public RiscvInstr {
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int basicShift_;
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public:
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// 传入所有要pop的变量
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PopRiscvInst(std::vector<RiscvOperand *> &lists, RiscvBasicBlock *bb,
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int basicShift)
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: RiscvInstr(InstrType::POP, lists.size(), bb), basicShift_(basicShift) {
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for (int i = 0; i < lists.size(); i++)
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setOperand(i, lists[i]);
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}
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std::string print() override;
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};
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// call调用语句+压栈语句
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// 0作为函数名，1-n是函数各参数
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class CallRiscvInst : public RiscvInstr {
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public:
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CallRiscvInst(RiscvFunction *func, RiscvBasicBlock *bb)
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: RiscvInstr(InstrType::CALL, 1, bb) {
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setOperand(0, func);
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}
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virtual std::string print() override;
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};
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// 仅返回语句，返回参数由上层的block对应的function构造push语句和lw sw指令
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class ReturnRiscvInst : public RiscvInstr {
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public:
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ReturnRiscvInst(RiscvBasicBlock *bb) : RiscvInstr(InstrType::RET, 0, bb) {}
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std::string print() override;
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};
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// Store 指令格式：sw source_value(reg), shift(base reg)
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// 目的：source_value->M[base reg + shift]
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// 传入源寄存器，目的寄存器和偏移地址（默认为0）
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// 如果是直接寻址，则base填x0号寄存器
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class StoreRiscvInst : public RiscvInstr {
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public:
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int shift_; // 地址偏移量
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Type type; // 到底是浮点还是整型
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StoreRiscvInst(Type *ty, RiscvOperand *source, RiscvOperand *target,
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RiscvBasicBlock *bb, int shift = 0)
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: RiscvInstr(InstrType::SW, 2, bb), shift_(shift), type(ty->tid_) {
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setOperand(0, source);
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setOperand(1, target);
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this->parent_ = bb;
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if (source->isRegister() == false) {
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std::cerr << "[Fatal error] Invalid store instruction: " << print()
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<< std::endl;
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std::terminate();
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}
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}
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std::string print() override;
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};
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// 指令传入格式同store
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// 先dest 后base reg
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// 目的：M[base reg + shift]->dest reg
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// 需指明是浮点还是整型
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class LoadRiscvInst : public RiscvInstr {
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public:
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int shift_; // 地址偏移量
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Type type; // 到底是浮点还是整型
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LoadRiscvInst(Type *ty, RiscvOperand *dest, RiscvOperand *target,
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RiscvBasicBlock *bb, int shift = 0)
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: RiscvInstr(InstrType::LW, 2, bb), shift_(shift), type(ty->tid_) {
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setOperand(0, dest);
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setOperand(1, target);
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if (target == nullptr) {
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std::cerr << "[Fatal Error] Load Instruction's target is nullptr."
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<< std::endl;
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std::terminate();
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}
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this->parent_ = bb;
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}
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std::string print() override;
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};
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// 整型比较
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// 类型：cmpop val1, val2, true_link
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// 传入参数：val1, val2, true_link, false_link（basic block指针形式）
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// false_link如果为为下一条语句则不会发射j false_link指令
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class ICmpRiscvInstr : public RiscvInstr {
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public:
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static const std::map<ICmpInst::ICmpOp, std::string> ICmpOpName;
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static const std::map<ICmpInst::ICmpOp, std::string> ICmpOpSName;
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static const std::map<ICmpInst::ICmpOp, ICmpInst::ICmpOp> ICmpOpEquiv;
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ICmpRiscvInstr(ICmpInst::ICmpOp op, RiscvOperand *v1, RiscvOperand *v2,
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RiscvBasicBlock *trueLink, RiscvBasicBlock *falseLink,
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RiscvBasicBlock *bb)
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: RiscvInstr(ICMP, 4, bb), icmp_op_(op) {
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setOperand(0, v1);
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setOperand(1, v2);
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setOperand(2, trueLink);
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setOperand(3, falseLink);
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}
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ICmpRiscvInstr(ICmpInst::ICmpOp op, RiscvOperand *v1, RiscvOperand *v2,
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RiscvBasicBlock *trueLink, RiscvBasicBlock *bb)
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: RiscvInstr(ICMP, 4, bb), icmp_op_(op) {
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setOperand(0, v1);
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setOperand(1, v2);
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setOperand(2, trueLink);
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setOperand(3, nullptr);
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}
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ICmpInst::ICmpOp icmp_op_;
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std::string print() override;
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};
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class ICmpSRiscvInstr : public ICmpRiscvInstr {
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public:
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ICmpSRiscvInstr(ICmpInst::ICmpOp op, RiscvOperand *v1, RiscvOperand *v2,
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RiscvOperand *target, RiscvBasicBlock *bb)
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: ICmpRiscvInstr(op, v1, v2, nullptr, bb) {
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setOperand(0, v1);
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setOperand(1, v2);
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setResult(target);
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}
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std::string print() override;
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};
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// 浮点比较
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// 类型：cmpop val1, val2, true_link, false_link
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// 假定basic block是顺序排布的，那么如果false_link恰好为下一个basic
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// block，则不会发射j false_link指令
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class FCmpRiscvInstr : public RiscvInstr {
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public:
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static const std::map<FCmpInst::FCmpOp, std::string> FCmpOpName;
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static const std::map<FCmpInst::FCmpOp, FCmpInst::FCmpOp> FCmpOpEquiv;
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FCmpRiscvInstr(FCmpInst::FCmpOp op, RiscvOperand *v1, RiscvOperand *v2,
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RiscvOperand *target, RiscvBasicBlock *bb)
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: RiscvInstr(FCMP, 2, bb), fcmp_op_(op) {
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setOperand(0, v1);
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setOperand(1, v2);
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setResult(target);
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}
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FCmpInst::FCmpOp fcmp_op_;
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std::string print() override;
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};
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class FpToSiRiscvInstr : public RiscvInstr {
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public:
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FpToSiRiscvInstr(RiscvOperand *Source, RiscvOperand *Target,
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RiscvBasicBlock *bb)
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: RiscvInstr(FPTOSI, 2, bb) {
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setOperand(0, Source);
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setOperand(1, Target);
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}
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virtual std::string print() override;
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};
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class SiToFpRiscvInstr : public RiscvInstr {
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public:
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SiToFpRiscvInstr(RiscvOperand *Source, RiscvOperand *Target,
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RiscvBasicBlock *bb)
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: RiscvInstr(SITOFP, 2, bb) {
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setOperand(0, Source);
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setOperand(1, Target);
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}
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virtual std::string print() override;
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};
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// LA rd, symbol ; x[rd] = &symbol
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// `dest` : rd
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// `name` : symbol
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class LoadAddressRiscvInstr : public RiscvInstr {
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public:
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std::string name_;
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LoadAddressRiscvInstr(RiscvOperand *dest, std::string name,
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RiscvBasicBlock *bb)
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: RiscvInstr(LA, 1, bb), name_(name) {
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setOperand(0, dest);
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}
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virtual std::string print() override;
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};
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/**
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* 分支指令类。
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* BEQ rs1, zero, label1
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* J label2
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*/
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class BranchRiscvInstr : public RiscvInstr {
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public:
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/// @brief 生成分支指令类。
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/// @param rs1 存储布尔值的寄存器
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/// @param trueLink 真值跳转基本块
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/// @param falseLink 假值跳转基本块
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BranchRiscvInstr(RiscvOperand *rs1, RiscvBasicBlock *trueLink,
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RiscvBasicBlock *falseLink, RiscvBasicBlock *bb)
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: RiscvInstr(BGT, 3, bb) {
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setOperand(0, rs1);
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setOperand(1, trueLink);
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setOperand(2, falseLink);
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}
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virtual std::string print() override;
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};
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#endif // !INSTRUCTIONH
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