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141 lines
4.5 KiB
141 lines
4.5 KiB
# Memory
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# 32-bit address
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# 8-bit cell
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# Register File
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# ·32 32-bit registers, with 2 read ports and 1 write portTest bench
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# / Add the number in memory address 0 and 1 to address 3
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# Load r1, #0
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# Load r2,#1
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# Add r3, r1, r2
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# Store r3, #3
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import numpy as np
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import re
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import random
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class register_file:
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def __init__(self , size) -> None:
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self.regs = np.array([0] * size , dtype=np.int32)
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self.size = size
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def read(self , idx1 : int , idx2 : int) -> tuple:# 2 read port
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if idx1 < 0 or idx1 >= self.size or idx2 < 0 or idx2 >= self.size:
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raise IndexError(f"The index is out of range")
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return (self.regs[idx1] , self.regs[idx2])
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def write(self , idx : int , value : np.int32) -> None:# 1 write port
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if idx < 0 or idx >= self.size:
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raise IndexError("The index is out of range")
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if value < -2**31 or value > 2**31 - 1:
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raise ValueError("The value is out of range")
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self.regs[idx] = value
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def info(self) -> None:
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print(f"register file : {self.regs}")
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class memory:
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def __init__(self , size):
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self.size = size
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self.mem = {key : np.int8(0) for key in range(10)}#8-bit cell
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# use dictionary to simulate 2**32 byte-memory
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def reset(self):
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self.mem = {key : np.int8(0) for key in self.mem}
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def info(self) -> None:
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print(f"memory : {self.mem}")
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def read(self , idx : int) -> np.int8:
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if idx < 0 or idx >= self.size:
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raise IndexError("The index is out of range")
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if idx not in self.mem:
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self.mem[idx] = np.int8(0)
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return self.mem[idx]
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def write(self , idx , value : np.int8) -> None:
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if idx < 0 or idx >= self.size:
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raise IndexError("The index is out of range")
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if(value < -128 or value > 127):
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raise ValueError("The value is out of range")
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self.mem[idx] = value
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class instruction:
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@staticmethod
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def Load(ins : list , immediate: bool = False) -> None:
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mem_val : np.int32 = np.int32(mem.read(ins[2])) | np.int32(mem.read(ins[2] + 1)) << 8 + np.int32(mem.read(ins[2] + 2)) << 16 + np.int32(mem.read(ins[2] + 3)) << 24
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regfile.write(ins[1] , mem_val)
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@staticmethod
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def Loadi(ins : list):#load immediate to register , just for test , style of instruction : Loadi r1 , i100
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regfile.write(ins[1] , ins[2]) #to fix : merge into Load instruction by adding flag immediate , maybe
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@staticmethod
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def Store(ins : list) -> None:
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reg_val : np.int32 = regfile.read(ins[1] , 0)[0]#just use one read port of regfile
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mem.write(ins[2] , np.int8(reg_val & 0xff))
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mem.write(ins[2] + 1 , np.int8((reg_val >> 8) & 0xff))
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mem.write(ins[2] + 2 , np.int8((reg_val >> 16) & 0xff))
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mem.write(ins[2] + 3 , np.int8((reg_val >> 24) & 0xff))
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@staticmethod
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def Add(ins : list) -> None:
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r1 , r2 = regfile.read(ins[2] , ins[3])
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regfile.write(ins[1] , r1 + r2)
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def exec_ins(self , ins : list) -> None:
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target_ins = getattr(type(self) , ins[0])
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if target_ins is None:
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raise RuntimeError("the error instruction {}".format(ins[0]))
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target_ins(ins)
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@staticmethod
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def parse_instruction(instruc : str) -> list:
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#parse the instruction
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_ins = re.split(r'[ ,]+' , instruc)# split the string by space and comma
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ins = [_ins[0]]
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for elem in _ins:
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if elem[0] == 'r' or elem[0] == '#' or elem[0] == 'i':#get the bias of address
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ins.append(int(elem[1:]))
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return ins
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class testbench:
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@staticmethod
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def memory_random_flip():
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mem.mem = {key : random.randint(-10,10) for key in mem.mem}
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@staticmethod
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def test():
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testbench.memory_random_flip()
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mem.info()
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test_instr = ['Load r1, #0' , 'Load r2,#1' , 'Add r3, r1, r2' , 'Store r3, #3']
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for ins in test_instr:
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_ins = instruction.parse_instruction(ins)
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instruc.exec_ins(_ins)
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mem.info()
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if __name__ == '__main__':
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global regfile , mem , instruc
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regfile = register_file(32)#32 32-bit registers
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mem = memory(2 ** 32)# 32-bit address memory
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instruc = instruction()
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testbench.test()
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while True:
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_inst = input('>')
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inst = instruc.parse_instruction(_inst)
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instruc.exec_ins(inst)
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mem.info()
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regfile.info() |