/* @generated */
digraph iCFG {
"test_loop.254a9d372f8f45542e409771135b9322_1" [label="1: Start test_loop\nFormals: \nLocals:  0$?%__sil_tmpSIL_temp_conditional___n$0:int 0$?%__sil_tmpSIL_temp_conditional___n$3:int 0$?%__sil_tmpSIL_temp_conditional___n$7:int block_size:char* spec:char* \n   DECLARE_LOCALS(&return,&0$?%__sil_tmpSIL_temp_conditional___n$0,&0$?%__sil_tmpSIL_temp_conditional___n$3,&0$?%__sil_tmpSIL_temp_conditional___n$7,&block_size,&spec); [line 29]\n " color=yellow style=filled]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_1" -> "test_loop.254a9d372f8f45542e409771135b9322_28" ;
"test_loop.254a9d372f8f45542e409771135b9322_2" [label="2: Exit test_loop \n  " color=yellow style=filled]
	

"test_loop.254a9d372f8f45542e409771135b9322_3" [label="3: + \n  " ]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_3" -> "test_loop.254a9d372f8f45542e409771135b9322_5" ;
	 "test_loop.254a9d372f8f45542e409771135b9322_3" -> "test_loop.254a9d372f8f45542e409771135b9322_6" ;
"test_loop.254a9d372f8f45542e409771135b9322_4" [label="4: + \n  " ]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_4" -> "test_loop.254a9d372f8f45542e409771135b9322_9" ;
	 "test_loop.254a9d372f8f45542e409771135b9322_4" -> "test_loop.254a9d372f8f45542e409771135b9322_10" ;
"test_loop.254a9d372f8f45542e409771135b9322_5" [label="5: Prune (true branch) \n   n$1=*&spec:char* [line 36]\n  PRUNE((n$1 != 0), true); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_5" -> "test_loop.254a9d372f8f45542e409771135b9322_7" ;
"test_loop.254a9d372f8f45542e409771135b9322_6" [label="6: Prune (false branch) \n   n$1=*&spec:char* [line 36]\n  PRUNE((n$1 == 0), false); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_6" -> "test_loop.254a9d372f8f45542e409771135b9322_8" ;
"test_loop.254a9d372f8f45542e409771135b9322_7" [label="7:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$0:int=0 [line 36]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_7" -> "test_loop.254a9d372f8f45542e409771135b9322_4" ;
"test_loop.254a9d372f8f45542e409771135b9322_8" [label="8:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$0:int=1 [line 36]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_8" -> "test_loop.254a9d372f8f45542e409771135b9322_4" ;
"test_loop.254a9d372f8f45542e409771135b9322_9" [label="9: Prune (true branch) \n   n$2=*&0$?%__sil_tmpSIL_temp_conditional___n$0:int [line 36]\n  PRUNE((n$2 != 0), true); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_9" -> "test_loop.254a9d372f8f45542e409771135b9322_12" ;
"test_loop.254a9d372f8f45542e409771135b9322_10" [label="10: Prune (false branch) \n   n$2=*&0$?%__sil_tmpSIL_temp_conditional___n$0:int [line 36]\n  PRUNE((n$2 == 0), false); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_10" -> "test_loop.254a9d372f8f45542e409771135b9322_2" ;
"test_loop.254a9d372f8f45542e409771135b9322_11" [label="11: + \n  " ]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_11" -> "test_loop.254a9d372f8f45542e409771135b9322_17" ;
	 "test_loop.254a9d372f8f45542e409771135b9322_11" -> "test_loop.254a9d372f8f45542e409771135b9322_18" ;
"test_loop.254a9d372f8f45542e409771135b9322_12" [label="12:  BinaryOperatorStmt: Assign \n   n$4=_fun_getenv(\"BLOCK_SIZE\":char const *) [line 36]\n  *&spec:char*=n$4 [line 36]\n  n$5=*&spec:char* [line 36]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_12" -> "test_loop.254a9d372f8f45542e409771135b9322_13" ;
	 "test_loop.254a9d372f8f45542e409771135b9322_12" -> "test_loop.254a9d372f8f45542e409771135b9322_14" ;
"test_loop.254a9d372f8f45542e409771135b9322_13" [label="13: Prune (true branch) \n   PRUNE((n$5 != 0), true); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_13" -> "test_loop.254a9d372f8f45542e409771135b9322_15" ;
"test_loop.254a9d372f8f45542e409771135b9322_14" [label="14: Prune (false branch) \n   PRUNE((n$5 == 0), false); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_14" -> "test_loop.254a9d372f8f45542e409771135b9322_16" ;
"test_loop.254a9d372f8f45542e409771135b9322_15" [label="15:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$3:int=0 [line 36]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_15" -> "test_loop.254a9d372f8f45542e409771135b9322_11" ;
"test_loop.254a9d372f8f45542e409771135b9322_16" [label="16:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$3:int=1 [line 36]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_16" -> "test_loop.254a9d372f8f45542e409771135b9322_11" ;
"test_loop.254a9d372f8f45542e409771135b9322_17" [label="17: Prune (true branch) \n   n$6=*&0$?%__sil_tmpSIL_temp_conditional___n$3:int [line 36]\n  PRUNE((n$6 != 0), true); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_17" -> "test_loop.254a9d372f8f45542e409771135b9322_20" ;
"test_loop.254a9d372f8f45542e409771135b9322_18" [label="18: Prune (false branch) \n   n$6=*&0$?%__sil_tmpSIL_temp_conditional___n$3:int [line 36]\n  PRUNE((n$6 == 0), false); [line 36]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_18" -> "test_loop.254a9d372f8f45542e409771135b9322_2" ;
"test_loop.254a9d372f8f45542e409771135b9322_19" [label="19: + \n  " ]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_19" -> "test_loop.254a9d372f8f45542e409771135b9322_25" ;
	 "test_loop.254a9d372f8f45542e409771135b9322_19" -> "test_loop.254a9d372f8f45542e409771135b9322_26" ;
"test_loop.254a9d372f8f45542e409771135b9322_20" [label="20:  BinaryOperatorStmt: Assign \n   n$8=_fun_getenv(\"BLOCKSIZE\":char const *) [line 37]\n  *&spec:char*=n$8 [line 37]\n  n$9=*&spec:char* [line 37]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_20" -> "test_loop.254a9d372f8f45542e409771135b9322_21" ;
	 "test_loop.254a9d372f8f45542e409771135b9322_20" -> "test_loop.254a9d372f8f45542e409771135b9322_22" ;
"test_loop.254a9d372f8f45542e409771135b9322_21" [label="21: Prune (true branch) \n   PRUNE((n$9 != 0), true); [line 37]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_21" -> "test_loop.254a9d372f8f45542e409771135b9322_23" ;
"test_loop.254a9d372f8f45542e409771135b9322_22" [label="22: Prune (false branch) \n   PRUNE((n$9 == 0), false); [line 37]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_22" -> "test_loop.254a9d372f8f45542e409771135b9322_24" ;
"test_loop.254a9d372f8f45542e409771135b9322_23" [label="23:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$7:int=0 [line 37]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_23" -> "test_loop.254a9d372f8f45542e409771135b9322_19" ;
"test_loop.254a9d372f8f45542e409771135b9322_24" [label="24:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$7:int=1 [line 37]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_24" -> "test_loop.254a9d372f8f45542e409771135b9322_19" ;
"test_loop.254a9d372f8f45542e409771135b9322_25" [label="25: Prune (true branch) \n   n$10=*&0$?%__sil_tmpSIL_temp_conditional___n$7:int [line 37]\n  PRUNE((n$10 != 0), true); [line 37]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_25" -> "test_loop.254a9d372f8f45542e409771135b9322_27" ;
"test_loop.254a9d372f8f45542e409771135b9322_26" [label="26: Prune (false branch) \n   n$10=*&0$?%__sil_tmpSIL_temp_conditional___n$7:int [line 37]\n  PRUNE((n$10 == 0), false); [line 37]\n " shape="invhouse"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_26" -> "test_loop.254a9d372f8f45542e409771135b9322_2" ;
"test_loop.254a9d372f8f45542e409771135b9322_27" [label="27:  BinaryOperatorStmt: Assign \n   *&block_size:char*=null [line 38]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_27" -> "test_loop.254a9d372f8f45542e409771135b9322_3" ;
"test_loop.254a9d372f8f45542e409771135b9322_28" [label="28:  BinaryOperatorStmt: Assign \n   n$11=_fun_getenv(\"BLOCK\":char const *) [line 34]\n  *&spec:char*=n$11 [line 34]\n " shape="box"]
	

	 "test_loop.254a9d372f8f45542e409771135b9322_28" -> "test_loop.254a9d372f8f45542e409771135b9322_3" ;
"main.fad58de7366495db4650cfefac2fcd61_1" [label="1: Start main\nFormals: \nLocals:  0$?%__sil_tmpSIL_temp_conditional___n$0:int 0$?%__sil_tmpSIL_temp_conditional___n$3:int 0$?%__sil_tmpSIL_temp_conditional___n$7:int block_size:char* spec:char* \n   DECLARE_LOCALS(&return,&0$?%__sil_tmpSIL_temp_conditional___n$0,&0$?%__sil_tmpSIL_temp_conditional___n$3,&0$?%__sil_tmpSIL_temp_conditional___n$7,&block_size,&spec); [line 42]\n " color=yellow style=filled]
	

	 "main.fad58de7366495db4650cfefac2fcd61_1" -> "main.fad58de7366495db4650cfefac2fcd61_34" ;
"main.fad58de7366495db4650cfefac2fcd61_2" [label="2: Exit main \n  " color=yellow style=filled]
	

"main.fad58de7366495db4650cfefac2fcd61_3" [label="3:  Return Stmt \n   *&return:int=0 [line 56]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_3" -> "main.fad58de7366495db4650cfefac2fcd61_2" ;
"main.fad58de7366495db4650cfefac2fcd61_4" [label="4: + \n  " ]
	

	 "main.fad58de7366495db4650cfefac2fcd61_4" -> "main.fad58de7366495db4650cfefac2fcd61_3" ;
"main.fad58de7366495db4650cfefac2fcd61_5" [label="5: + \n  " ]
	

	 "main.fad58de7366495db4650cfefac2fcd61_5" -> "main.fad58de7366495db4650cfefac2fcd61_10" ;
	 "main.fad58de7366495db4650cfefac2fcd61_5" -> "main.fad58de7366495db4650cfefac2fcd61_11" ;
"main.fad58de7366495db4650cfefac2fcd61_6" [label="6: Prune (true branch) \n   n$1=*&spec:char* [line 49]\n  PRUNE((n$1 != 0), true); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_6" -> "main.fad58de7366495db4650cfefac2fcd61_8" ;
"main.fad58de7366495db4650cfefac2fcd61_7" [label="7: Prune (false branch) \n   n$1=*&spec:char* [line 49]\n  PRUNE((n$1 == 0), false); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_7" -> "main.fad58de7366495db4650cfefac2fcd61_9" ;
"main.fad58de7366495db4650cfefac2fcd61_8" [label="8:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$0:int=0 [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_8" -> "main.fad58de7366495db4650cfefac2fcd61_5" ;
"main.fad58de7366495db4650cfefac2fcd61_9" [label="9:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$0:int=1 [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_9" -> "main.fad58de7366495db4650cfefac2fcd61_5" ;
"main.fad58de7366495db4650cfefac2fcd61_10" [label="10: Prune (true branch) \n   n$2=*&0$?%__sil_tmpSIL_temp_conditional___n$0:int [line 49]\n  PRUNE((n$2 != 0), true); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_10" -> "main.fad58de7366495db4650cfefac2fcd61_13" ;
"main.fad58de7366495db4650cfefac2fcd61_11" [label="11: Prune (false branch) \n   n$2=*&0$?%__sil_tmpSIL_temp_conditional___n$0:int [line 49]\n  PRUNE((n$2 == 0), false); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_11" -> "main.fad58de7366495db4650cfefac2fcd61_30" ;
"main.fad58de7366495db4650cfefac2fcd61_12" [label="12: + \n  " ]
	

	 "main.fad58de7366495db4650cfefac2fcd61_12" -> "main.fad58de7366495db4650cfefac2fcd61_18" ;
	 "main.fad58de7366495db4650cfefac2fcd61_12" -> "main.fad58de7366495db4650cfefac2fcd61_19" ;
"main.fad58de7366495db4650cfefac2fcd61_13" [label="13:  BinaryOperatorStmt: Assign \n   n$4=_fun_getenv(\"BLOCK_SIZE\":char const *) [line 49]\n  *&spec:char*=n$4 [line 49]\n  n$5=*&spec:char* [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_13" -> "main.fad58de7366495db4650cfefac2fcd61_14" ;
	 "main.fad58de7366495db4650cfefac2fcd61_13" -> "main.fad58de7366495db4650cfefac2fcd61_15" ;
"main.fad58de7366495db4650cfefac2fcd61_14" [label="14: Prune (true branch) \n   PRUNE((n$5 != 0), true); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_14" -> "main.fad58de7366495db4650cfefac2fcd61_16" ;
"main.fad58de7366495db4650cfefac2fcd61_15" [label="15: Prune (false branch) \n   PRUNE((n$5 == 0), false); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_15" -> "main.fad58de7366495db4650cfefac2fcd61_17" ;
"main.fad58de7366495db4650cfefac2fcd61_16" [label="16:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$3:int=0 [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_16" -> "main.fad58de7366495db4650cfefac2fcd61_12" ;
"main.fad58de7366495db4650cfefac2fcd61_17" [label="17:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$3:int=1 [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_17" -> "main.fad58de7366495db4650cfefac2fcd61_12" ;
"main.fad58de7366495db4650cfefac2fcd61_18" [label="18: Prune (true branch) \n   n$6=*&0$?%__sil_tmpSIL_temp_conditional___n$3:int [line 49]\n  PRUNE((n$6 != 0), true); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_18" -> "main.fad58de7366495db4650cfefac2fcd61_21" ;
"main.fad58de7366495db4650cfefac2fcd61_19" [label="19: Prune (false branch) \n   n$6=*&0$?%__sil_tmpSIL_temp_conditional___n$3:int [line 49]\n  PRUNE((n$6 == 0), false); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_19" -> "main.fad58de7366495db4650cfefac2fcd61_30" ;
"main.fad58de7366495db4650cfefac2fcd61_20" [label="20: + \n  " ]
	

	 "main.fad58de7366495db4650cfefac2fcd61_20" -> "main.fad58de7366495db4650cfefac2fcd61_26" ;
	 "main.fad58de7366495db4650cfefac2fcd61_20" -> "main.fad58de7366495db4650cfefac2fcd61_27" ;
"main.fad58de7366495db4650cfefac2fcd61_21" [label="21:  BinaryOperatorStmt: Assign \n   n$8=_fun_getenv(\"BLOCKSIZE\":char const *) [line 49]\n  *&spec:char*=n$8 [line 49]\n  n$9=*&spec:char* [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_21" -> "main.fad58de7366495db4650cfefac2fcd61_22" ;
	 "main.fad58de7366495db4650cfefac2fcd61_21" -> "main.fad58de7366495db4650cfefac2fcd61_23" ;
"main.fad58de7366495db4650cfefac2fcd61_22" [label="22: Prune (true branch) \n   PRUNE((n$9 != 0), true); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_22" -> "main.fad58de7366495db4650cfefac2fcd61_24" ;
"main.fad58de7366495db4650cfefac2fcd61_23" [label="23: Prune (false branch) \n   PRUNE((n$9 == 0), false); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_23" -> "main.fad58de7366495db4650cfefac2fcd61_25" ;
"main.fad58de7366495db4650cfefac2fcd61_24" [label="24:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$7:int=0 [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_24" -> "main.fad58de7366495db4650cfefac2fcd61_20" ;
"main.fad58de7366495db4650cfefac2fcd61_25" [label="25:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$7:int=1 [line 49]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_25" -> "main.fad58de7366495db4650cfefac2fcd61_20" ;
"main.fad58de7366495db4650cfefac2fcd61_26" [label="26: Prune (true branch) \n   n$10=*&0$?%__sil_tmpSIL_temp_conditional___n$7:int [line 49]\n  PRUNE((n$10 != 0), true); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_26" -> "main.fad58de7366495db4650cfefac2fcd61_28" ;
"main.fad58de7366495db4650cfefac2fcd61_27" [label="27: Prune (false branch) \n   n$10=*&0$?%__sil_tmpSIL_temp_conditional___n$7:int [line 49]\n  PRUNE((n$10 == 0), false); [line 49]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_27" -> "main.fad58de7366495db4650cfefac2fcd61_30" ;
"main.fad58de7366495db4650cfefac2fcd61_28" [label="28:  BinaryOperatorStmt: Assign \n   *&block_size:char*=null [line 50]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_28" -> "main.fad58de7366495db4650cfefac2fcd61_4" ;
"main.fad58de7366495db4650cfefac2fcd61_29" [label="29: + \n  " ]
	

	 "main.fad58de7366495db4650cfefac2fcd61_29" -> "main.fad58de7366495db4650cfefac2fcd61_4" ;
"main.fad58de7366495db4650cfefac2fcd61_30" [label="30:  BinaryOperatorStmt: EQ \n   n$11=*&spec:char* [line 52]\n  n$12=*n$11:char [line 52]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_30" -> "main.fad58de7366495db4650cfefac2fcd61_31" ;
	 "main.fad58de7366495db4650cfefac2fcd61_30" -> "main.fad58de7366495db4650cfefac2fcd61_32" ;
"main.fad58de7366495db4650cfefac2fcd61_31" [label="31: Prune (true branch) \n   PRUNE(((n$12 == 39) != 0), true); [line 52]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_31" -> "main.fad58de7366495db4650cfefac2fcd61_33" ;
"main.fad58de7366495db4650cfefac2fcd61_32" [label="32: Prune (false branch) \n   PRUNE(((n$12 == 39) == 0), false); [line 52]\n " shape="invhouse"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_32" -> "main.fad58de7366495db4650cfefac2fcd61_29" ;
"main.fad58de7366495db4650cfefac2fcd61_33" [label="33:  BinaryOperatorStmt: Assign \n   *&block_size:char*=null [line 53]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_33" -> "main.fad58de7366495db4650cfefac2fcd61_29" ;
"main.fad58de7366495db4650cfefac2fcd61_34" [label="34:  BinaryOperatorStmt: Assign \n   n$13=_fun_getenv(\"BLOCK\":char const *) [line 47]\n  *&spec:char*=n$13 [line 47]\n " shape="box"]
	

	 "main.fad58de7366495db4650cfefac2fcd61_34" -> "main.fad58de7366495db4650cfefac2fcd61_6" ;
	 "main.fad58de7366495db4650cfefac2fcd61_34" -> "main.fad58de7366495db4650cfefac2fcd61_7" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_1" [label="1: Start shortcircuit_or\nFormals:  x:int*\nLocals:  \n   DECLARE_LOCALS(&return); [line 12]\n " color=yellow style=filled]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_1" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_5" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_2" [label="2: Exit shortcircuit_or \n  " color=yellow style=filled]
	

"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_3" [label="3: + \n  " ]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_3" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_4" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_4" [label="4:  between_join_and_exit \n  " shape="box"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_4" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_2" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_5" [label="5:  BinaryOperatorStmt: EQ \n   n$0=*&x:int* [line 14]\n " shape="box"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_5" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_6" ;
	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_5" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_7" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_6" [label="6: Prune (true branch) \n   PRUNE(((n$0 == null) != 0), true); [line 14]\n " shape="invhouse"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_6" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_11" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_7" [label="7: Prune (false branch) \n   PRUNE(((n$0 == null) == 0), false); [line 14]\n " shape="invhouse"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_7" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_8" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_8" [label="8:  BinaryOperatorStmt: EQ \n   n$1=*&x:int* [line 14]\n  n$2=*n$1:int [line 14]\n " shape="box"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_8" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_9" ;
	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_8" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_10" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_9" [label="9: Prune (true branch) \n   PRUNE(((n$2 == 2) != 0), true); [line 14]\n " shape="invhouse"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_9" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_11" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_10" [label="10: Prune (false branch) \n   PRUNE(((n$2 == 2) == 0), false); [line 14]\n " shape="invhouse"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_10" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_12" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_11" [label="11:  BinaryOperatorStmt: Assign \n   *&x:int*=17 [line 15]\n " shape="box"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_11" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_3" ;
"shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_12" [label="12:  BinaryOperatorStmt: Assign \n   *&x:int*=32 [line 17]\n " shape="box"]
	

	 "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_12" -> "shortcircuit_or.5845fe75b89f8af7ec1944cd207962af_3" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_1" [label="1: Start shortcircuit_and\nFormals:  x:int*\nLocals:  0$?%__sil_tmpSIL_temp_conditional___n$0:int 0$?%__sil_tmpSIL_temp_conditional___n$3:int \n   DECLARE_LOCALS(&return,&0$?%__sil_tmpSIL_temp_conditional___n$0,&0$?%__sil_tmpSIL_temp_conditional___n$3); [line 21]\n " color=yellow style=filled]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_1" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_6" ;
	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_1" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_7" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_2" [label="2: Exit shortcircuit_and \n  " color=yellow style=filled]
	

"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_3" [label="3: + \n  " ]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_3" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_4" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_4" [label="4:  between_join_and_exit \n  " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_4" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_2" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_5" [label="5: + \n  " ]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_5" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_10" ;
	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_5" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_11" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_6" [label="6: Prune (true branch) \n   n$1=*&x:int* [line 22]\n  PRUNE((n$1 != 0), true); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_6" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_8" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_7" [label="7: Prune (false branch) \n   n$1=*&x:int* [line 22]\n  PRUNE((n$1 == 0), false); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_7" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_9" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_8" [label="8:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$0:int=0 [line 22]\n " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_8" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_5" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_9" [label="9:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$0:int=1 [line 22]\n " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_9" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_5" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_10" [label="10: Prune (true branch) \n   n$2=*&0$?%__sil_tmpSIL_temp_conditional___n$0:int [line 22]\n  PRUNE((n$2 != 0), true); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_10" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_13" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_11" [label="11: Prune (false branch) \n   n$2=*&0$?%__sil_tmpSIL_temp_conditional___n$0:int [line 22]\n  PRUNE((n$2 == 0), false); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_11" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_21" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_12" [label="12: + \n  " ]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_12" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_18" ;
	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_12" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_19" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_13" [label="13:  BinaryOperatorStmt: Assign \n   n$4=_fun_getenv(\"BLOCK\":char const *) [line 22]\n  *&x:int*=n$4 [line 22]\n  n$5=*&x:int* [line 22]\n " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_13" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_14" ;
	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_13" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_15" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_14" [label="14: Prune (true branch) \n   PRUNE((n$5 != 0), true); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_14" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_16" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_15" [label="15: Prune (false branch) \n   PRUNE((n$5 == 0), false); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_15" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_17" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_16" [label="16:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$3:int=0 [line 22]\n " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_16" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_12" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_17" [label="17:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$3:int=1 [line 22]\n " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_17" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_12" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_18" [label="18: Prune (true branch) \n   n$6=*&0$?%__sil_tmpSIL_temp_conditional___n$3:int [line 22]\n  PRUNE((n$6 != 0), true); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_18" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_20" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_19" [label="19: Prune (false branch) \n   n$6=*&0$?%__sil_tmpSIL_temp_conditional___n$3:int [line 22]\n  PRUNE((n$6 == 0), false); [line 22]\n " shape="invhouse"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_19" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_21" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_20" [label="20:  BinaryOperatorStmt: Assign \n   *&x:int*=17 [line 23]\n " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_20" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_3" ;
"shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_21" [label="21:  BinaryOperatorStmt: Assign \n   n$7=*&x:int* [line 25]\n  *n$7:int=32 [line 25]\n " shape="box"]
	

	 "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_21" -> "shortcircuit_and.10f9635d805ff3bd29dfc80b8f8d12da_3" ;
}
