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# Copyright (c) 2015 - present Facebook, Inc.
# All rights reserved.
#
# This source code is licensed under the BSD style license found in the
# LICENSE file in the root directory of this source tree. An additional grant
# of patent rights can be found in the PATENTS file in the same directory.
ROOT_DIR = ../../..
include $(ROOT_DIR)/Makefile.config
CPP_MODELS_FILE = $(SPECS_LIB_DIR)/cpp_models
CPP_MODELS_SOURCES = $(shell find src/ -name "*.cpp")
C_MODELS_SOURCES = $(shell find src/c_src/ -name "*.c")
all: $(CPP_MODELS_FILE)
$(CPP_MODELS_FILE): $(CPP_MODELS_SOURCES) $(C_MODELS_SOURCES) $(CLANG_DEPS)
# make clean in src/ in case $(CLANG_DEPS) have changed
$(MAKE) -C src clean
$(INFER_BIN) -o out/ --models-mode --no-failures-allowed --cxx -- $(MAKE) -C src
touch $(CPP_MODELS_FILE)
install: $(CPP_MODELS_FILE)
move all config variables to Makefile.config.in Summary: Hardcoding `variable@` in Makefiles is Bad™ because it prevents the users from overwriting them easily with `make variable="my custom value"`. The right way to do it is thus: ``` variable = variable@ # then use $(variable) everywhere ``` This diff puts all the `variable = variable@` lines in Makefile.config.in, and changes every occurrence of a `variable@` to `$(variable)` everywhere else. I mostly automated generating this diff. Here are the steps I did: - find out which `variable@`s we use: find . -name 'Makefile*' -exec grep -e '@[^@ []\+@' -o -h \{\} \+ | sort | uniq > config_variables - write this `replace.sh` script to replace every `variable@` with `$(variable)`: ``` #!/bin/sh config_vars_file=$1 shift for line in $(cat $config_vars_file); do var=$(echo $line | tr -d @) sed -i -e "s/$line/\$($var)/g" $@ > /dev/null done ``` - run the script as such: find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \) -exec ./replace.sh config_variables \{\} \+ - put all the `VARIABLE = VARIABLE@` lines in Makefile.config.in - move all `Makefile.in` to `Makefile`, since they don't need to be generated by `./configure` anymore: ``` for i in $(find . -name 'Makefile.*in' \( -not -wholename './Makefile.config.in' \)); do \ rm $(dirname $i)/$(basename $i .in) && git mv $i $(dirname $i)/$(basename $i .in) ; \ done ``` - delete all Makefile except Makefile.config from configure.ac - manually inspect and remove remaining instances of `VAR = $(VAR)` in makefiles, looking at the output of `git grep '^\(\w\+\) = $(\1)'` Reviewed By: jberdine Differential Revision: D3358379 fbshipit-source-id: 5d37f02
9 years ago
$(INSTALL) -m 644 -C out/specs/*.specs $(SPECS_LIB_DIR)
clean:
@rm -f $(CPP_MODELS_FILE)
$(MAKE) -C src clean
.PHONY: all clean install