/* @generated */
digraph iCFG {
"test5:#A#instance.4d6ac42705853160b533ab46b444624a_1" [label="1: Start A_test5:\nFormals:  self:A* b:_Bool\nLocals:  0$?%__sil_tmpSIL_temp_conditional___n$2:int \n   DECLARE_LOCALS(&return,&0$?%__sil_tmpSIL_temp_conditional___n$2); [line 23]\n " color=yellow style=filled]
	

	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_1" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_4" ;
	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_1" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_5" ;
"test5:#A#instance.4d6ac42705853160b533ab46b444624a_2" [label="2: Exit A_test5: \n  " color=yellow style=filled]
	

"test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" [label="3: + \n  " ]
	

	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_8" ;
"test5:#A#instance.4d6ac42705853160b533ab46b444624a_4" [label="4: Prune (true branch) \n   n$3=*&b:_Bool [line 24]\n  PRUNE((n$3 != 0), true); [line 24]\n " shape="invhouse"]
	

	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_4" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_6" ;
"test5:#A#instance.4d6ac42705853160b533ab46b444624a_5" [label="5: Prune (false branch) \n   n$3=*&b:_Bool [line 24]\n  PRUNE((n$3 == 0), false); [line 24]\n " shape="invhouse"]
	

	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_5" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_7" ;
"test5:#A#instance.4d6ac42705853160b533ab46b444624a_6" [label="6:  ConditinalStmt Branch \n   n$4=*&b:_Bool [line 24]\n  *&0$?%__sil_tmpSIL_temp_conditional___n$2:int=n$4 [line 24]\n " shape="box"]
	

	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_6" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" ;
"test5:#A#instance.4d6ac42705853160b533ab46b444624a_7" [label="7:  ConditinalStmt Branch \n   *&0$?%__sil_tmpSIL_temp_conditional___n$2:int=1 [line 24]\n " shape="box"]
	

	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_7" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" ;
"test5:#A#instance.4d6ac42705853160b533ab46b444624a_8" [label="8:  Return Stmt \n   n$1=*&self:A* [line 24]\n  n$5=*&0$?%__sil_tmpSIL_temp_conditional___n$2:int [line 24]\n  n$6=_fun_A_test4:(n$1:A*,n$5:int) virtual [line 24]\n  *&return:int=n$6 [line 24]\n " shape="box"]
	

	 "test5:#A#instance.4d6ac42705853160b533ab46b444624a_8" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_2" ;
"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_1" [label="1: Start A_test4:\nFormals:  self:A* x:int\nLocals:  \n   DECLARE_LOCALS(&return); [line 19]\n " color=yellow style=filled]
	

	 "test4:#A#instance.718a300d6fa63609a70f22221a548ee5_1" -> "test4:#A#instance.718a300d6fa63609a70f22221a548ee5_3" ;
"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_2" [label="2: Exit A_test4: \n  " color=yellow style=filled]
	

"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_3" [label="3:  Return Stmt \n   n$0=*&x:int [line 20]\n  *&return:int=n$0 [line 20]\n " shape="box"]
	

	 "test4:#A#instance.718a300d6fa63609a70f22221a548ee5_3" -> "test4:#A#instance.718a300d6fa63609a70f22221a548ee5_2" ;
}