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50 lines
1.5 KiB
50 lines
1.5 KiB
(*
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* Copyright (c) Facebook, Inc. and its affiliates.
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*
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* This source code is licensed under the MIT license found in the
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* LICENSE file in the root directory of this source tree.
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*)
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open! IStd
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open PulseBasicInterface
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module Access : sig
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include PrettyPrintable.PrintableOrderedType with type t = AbstractValue.t HilExp.Access.t
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val equal : t -> t -> bool
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end
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module AccessSet : Caml.Set.S with type elt = Access.t
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module AddrTrace : sig
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type t = AbstractValue.t * ValueHistory.t
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end
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module Edges : RecencyMap.S with type key = Access.t and type value = AddrTrace.t
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include PrettyPrintable.PPMonoMap with type key = AbstractValue.t and type value = Edges.t
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val compare : t -> t -> int
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val equal : t -> t -> bool
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val register_address : AbstractValue.t -> t -> t
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val add_edge : AbstractValue.t -> Access.t -> AddrTrace.t -> t -> t
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val find_edge_opt : AbstractValue.t -> Access.t -> t -> AddrTrace.t option
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val has_edge : AbstractValue.t -> Access.t -> t -> bool
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val yojson_of_t : t -> Yojson.Safe.t
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val is_allocated : t -> AbstractValue.t -> bool
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(** whether the address has a non-empty set of edges *)
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val canonicalize : get_var_repr:(AbstractValue.t -> AbstractValue.t) -> t -> t SatUnsat.t
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(** replace each address in the heap by its canonical representative according to the current
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equality relation, represented by [get_var_repr]; also remove addresses that point to empty
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edges *)
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val subst_var : AbstractValue.t * AbstractValue.t -> t -> t SatUnsat.t
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