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47 lines
3.1 KiB
47 lines
3.1 KiB
/* @generated */
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digraph cfg {
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"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_1" [label="1: Start A::test4:\nFormals: self:A* x:int\nLocals: \n " color=yellow style=filled]
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"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_1" -> "test4:#A#instance.718a300d6fa63609a70f22221a548ee5_3" ;
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"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_2" [label="2: Exit A::test4: \n " color=yellow style=filled]
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"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_3" [label="3: Return Stmt \n n$0=*&x:int [line 18, column 10]\n *&return:int=n$0 [line 18, column 3]\n " shape="box"]
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"test4:#A#instance.718a300d6fa63609a70f22221a548ee5_3" -> "test4:#A#instance.718a300d6fa63609a70f22221a548ee5_2" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_1" [label="1: Start A::test5:\nFormals: self:A* b:_Bool\nLocals: 0$?%__sil_tmpSIL_temp_conditional___n$1:int \n " color=yellow style=filled]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_1" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_4" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_1" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_5" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_2" [label="2: Exit A::test5: \n " color=yellow style=filled]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" [label="3: + \n " ]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_8" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_4" [label="4: Prune (true branch, boolean exp) \n n$2=*&b:_Bool [line 22, column 23]\n PRUNE(n$2, true); [line 22, column 23]\n " shape="invhouse"]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_4" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_6" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_5" [label="5: Prune (false branch, boolean exp) \n n$2=*&b:_Bool [line 22, column 23]\n PRUNE(!n$2, false); [line 22, column 23]\n " shape="invhouse"]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_5" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_7" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_6" [label="6: ConditionalStmt Branch \n n$3=*&b:_Bool [line 22, column 27]\n *&0$?%__sil_tmpSIL_temp_conditional___n$1:int=n$3 [line 22, column 23]\n " shape="box"]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_6" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_7" [label="7: ConditionalStmt Branch \n *&0$?%__sil_tmpSIL_temp_conditional___n$1:int=1 [line 22, column 23]\n " shape="box"]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_7" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_3" ;
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_8" [label="8: Return Stmt \n n$5=*&self:A* [line 22, column 11]\n n$4=*&0$?%__sil_tmpSIL_temp_conditional___n$1:int [line 22, column 23]\n n$6=_fun_A::test4:(n$5:A*,n$4:int) virtual [line 22, column 10]\n *&return:int=n$6 [line 22, column 3]\n " shape="box"]
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"test5:#A#instance.4d6ac42705853160b533ab46b444624a_8" -> "test5:#A#instance.4d6ac42705853160b533ab46b444624a_2" ;
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}
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