master
郑几方 3 years ago
parent 679e72d257
commit 097fe7cc57

Binary file not shown.

@ -11,9 +11,9 @@ class data_mem:
): # 写使能,读使能,(使能为int的0或1)地址输入数据func3 #输出为data_out
if write_en:
if funct3 == '000': # sb
self.memory[address] = InttoBin(data_in % 2 ** 8, 8)
self.memory[address] = InttoBin(data_in % 2**8, 8)
elif funct3 == '001': # sh
temp = InttoBin(data_in % 2 ** 16, 16)
temp = InttoBin(data_in % 2**16, 16)
self.memory[address + 1] = temp[0:8]
self.memory[address] = temp[8:16]
elif funct3 == '010': # sw
@ -45,5 +45,5 @@ class data_mem:
self.memory[address + 1] +
self.memory[address])
else:
pass
data_out = '0' * 32
return data_out

@ -12,13 +12,14 @@ from mux import *
from mux4 import *
from proc_controller import *
from reg_file import reg_file
from elftools.elf.elffile import ELFFile
IM = insn_mem()
PC = 0
def IF(BrPC, Brflush, stall, PC, IM):
if Brflush == '1':
if Brflush == 1:
nPC = BrPC
else:
nPC = PC + 4
@ -121,6 +122,30 @@ def dataPath():
insnA = '0' * 32
ALU_resultB = 0
PCA = 0
nPC = 0
imaddr = 4
testfile = open('outFileBinary.txt', 'r')
line = ''
with open('arch-fib', 'rb') as f:
e = ELFFile(f)
code = e.get_section_by_name('.text')
nextc = e.get_section_by_name('.rodata')
ops = code.data()
addr = code['sh_addr']
nextaddr = nextc['sh_addr']
for pos in range(0, nextaddr - addr, 4):
s = ''
for i in range(3, -1, -1):
s += (8 - len(bin(ops[pos + i])[2:])) * '0' + bin(
ops[pos + i])[2:]
line = testfile.readline()[:-1]
if s != line:
print('fault in line ' + str(int(pos / 4 + 1)))
IM.memory[imaddr + 3], IM.memory[imaddr + 2], IM.memory[
imaddr +
1], IM.memory[imaddr] = s[:8], s[8:16], s[16:24], s[24:]
imaddr += 4
while True:
WB_dataD, RegWriteD, forward_a, forward_b = WB(
@ -153,9 +178,28 @@ def dataPath():
tempBD = tempBC
MemtoRegB, RegWriteB, MemWriteB, RWSelB, MemReadB, pc_plus_immB, pc_plus_4B, BrPC, Brflush, ALU_resultB, rs1B, rs2B, rdB, tempAB, tempBB, funct3B, funct7B, stall = EX(
ALUSrcB, MemtoRegB, RegWriteB, MemReadB, MemWriteB, ALUOpB,
BranchB, JalrSelB, RWSelB, PCB, RD1B, RD2B, ImmGB, rs1B, rs2B, rdB,
funct3B, funct7B, lastrs1=insnA[12:17], lastrs2=insnA[7:12], forwardA=forward_a, forwardB=forward_b,
ALUSrcB,
MemtoRegB,
RegWriteB,
MemReadB,
MemWriteB,
ALUOpB,
BranchB,
JalrSelB,
RWSelB,
PCB,
RD1B,
RD2B,
ImmGB,
rs1B,
rs2B,
rdB,
funct3B,
funct7B,
lastrs1=insnA[12:17],
lastrs2=insnA[7:12],
forwardA=forward_a,
forwardB=forward_b,
WB_data=WB_dataD,
alu_out=ALU_resultB)
@ -197,7 +241,7 @@ def dataPath():
funct7B = insnA[0:7]
insnB = insnA
nPC, insn = IF(BrPC, Brflush, stall, PC, IM)
nPC, insn = IF(BrPC, Brflush, stall, nPC, IM)
if Brflush == '1':
PCA = 4

@ -1,5 +1,5 @@
class insn_mem:
memory = [8 * '0'] * 4 * 1024 * 16
memory = [8 * '0'] * 4 * 1024 * 1024
def __init__(self) -> None:
pass

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