def proc_controller(opcode):
    if opcode=='0110011':   #(add,and,or,sll,slt,sltu,sra,srl,sub,xor)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='0','0','1','0','0','10','0','0','00'
    elif opcode=='0110111': #(lui)20位立即数
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='0','0','1','0','0','00','0','0','10'
    elif opcode=='1101111': #(jal)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='1','0','1','0','0','11','1','0','01'
    elif opcode=='0010011': #(addi,andi,ori,slli,slti,sltiu,srai,srli,xori)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='1','0','1','0','0','10','0','0','00'
    elif opcode=='0000011': #(lb,lbu,lh,lhu,lw)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='1','1','1','1','0','00','0','0','00'
    elif opcode=='1100111': #(jalr)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='1','0','1','0','0','10','1','1','01'
    elif opcode=='0100011': #(sb, sh, sw)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='1','0','0','0','1','00','0','0','00'
    elif opcode=='1100011': #(beq,bge,bgeu,blt,bne,bltu)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='0','0','0','0','0','01','1','0','00'
    elif opcode=='1101111': #(jal)
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='1','0','1','0','0','11','1','0','01'
#################################
    elif opcode=='0010111': #(auipc)20位立即数
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='1','0','1','0','0','00','1','0','11'
    else:
        ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel='0','0','0','0','0','00','0','0','00'
    return ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel