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26 lines
2.1 KiB
26 lines
2.1 KiB
def proc_controller(opcode):
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if opcode == '0110011': # (add,and,or,sll,slt,sltu,sra,srl,sub,xor)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '0', '0', '1', '0', '0', '10', '0', '0', '00'
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elif opcode == '0110111': # (lui)20位立即数
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '0', '0', '1', '0', '0', '00', '0', '0', '10'
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elif opcode == '1101111': # (jal)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '1', '0', '1', '0', '0', '11', '1', '0', '01'
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elif opcode == '0010011': # (addi,andi,ori,slli,slti,sltiu,srai,srli,xori)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '1', '0', '1', '0', '0', '10', '0', '0', '00'
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elif opcode == '0000011': # (lb,lbu,lh,lhu,lw)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '1', '1', '1', '1', '0', '00', '0', '0', '00'
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elif opcode == '1100111': # (jalr)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '1', '0', '1', '0', '0', '10', '1', '1', '01'
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elif opcode == '0100011': # (sb, sh, sw)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '1', '0', '0', '0', '1', '00', '0', '0', '00'
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elif opcode == '1100011': # (beq,bge,bgeu,blt,bne,bltu)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '0', '0', '0', '0', '0', '01', '1', '0', '00'
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elif opcode == '1101111': # (jal)
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '1', '0', '1', '0', '0', '11', '1', '0', '01'
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#################################
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elif opcode == '0010111': # (auipc)20位立即数
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '1', '0', '1', '0', '0', '00', '1', '0', '10 '
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else:
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ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel = '0', '0', '0', '0', '0', '00', '0', '0', '00'
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return ALUSrc, MemtoReg, RegWrite, MemRead, MemWrite, ALUOp, Branch, JalrSel, RWSel
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