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42 lines
1.8 KiB
42 lines
1.8 KiB
`timescale 1ns / 1ps
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// 算数逻辑单元控制器
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module ALU_Controller (
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input logic [1:0] alu_op, // 2-bit opcode field from the Proc_controller
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input logic [6:0] funct7, // insn[31:25]
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input logic [2:0] funct3, // insn[14:12]
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output logic [3:0] operation // operation selection for ALU
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);
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// add your code here.
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always_comb
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case (alu_op)
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2'b00: operation = 4'b0000; // lw, sw
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2'b01:
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case (funct3)
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3'b000: operation = 4'b0101; // beq
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3'b001: operation = 4'b0110; // bne
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3'b100: operation = 4'b0111; // blt
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3'b101: operation = 4'b1000; // bge
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3'b110: operation = 4'b1001; // bltu
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3'b111: operation = 4'b1010; // bgeu
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default: operation = 4'b0000;
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endcase
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2'b10:
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case (funct3)
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3'b000:
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case (funct7)
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7'b0100000: operation = 4'b0001; // sub (存在addi的立即数恰好满足此情况的bug)
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default: operation = 4'b0000; // add, addi
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endcase
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3'b100: operation = 4'b1100; // xor
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3'b110: operation = 4'b0010; // or, ori
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3'b111: operation = 4'b0011; // and, andi
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3'b010: operation = 4'b0100; // slt
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default: operation = 4'b0000;
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endcase
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2'b11: operation = 4'b1011; // jal
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default: operation = 4'b0000;
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endcase
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endmodule
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