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36 lines
872 B
36 lines
872 B
`timescale 1ns / 1ps
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// 冒险探测器(阻塞生成器)
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module Hazard_detector (
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input logic clock,
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input logic reset,
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input logic [4:0] if_id_rs1,
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input logic [4:0] if_id_rs2,
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input logic [4:0] id_ex_rd,
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input logic id_ex_memread,
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output logic stall
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);
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// define your hazard detection logic here
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logic [1:0] counter;
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always @(negedge clock)
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begin
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if (reset)
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begin
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stall <= 1'b0;
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counter <= 2'b00;
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end
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else
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begin
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stall <= (id_ex_memread && ((id_ex_rd == if_id_rs1) || (id_ex_rd == if_id_rs2)));
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if (stall == 1'b1)
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counter <= counter + 2'b01;
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if (counter == 2'b10)
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begin
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counter <= 2'b00;
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stall <= 1'b0;
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end
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end
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end
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endmodule
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