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`timescale 1ns / 1ps
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// 四端口多路选择器
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module mux4 #(
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parameter WIDTH = 32
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)(
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input logic [WIDTH-1:0] d00, d01, d10, d11,
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input logic [1:0] s,
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output logic [WIDTH-1:0] y
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);
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assign y = (s==2'b11) ? d11 : (s==2'b10) ? d10 : (s==2'b01) ? d01 : d00;
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endmodule
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