forked from NUDT-compiler/nudt-compiler-cpp
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328 lines
11 KiB
328 lines
11 KiB
#include "mir/MIR.h"
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#include <ostream>
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#include <stdexcept>
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#include "utils/Log.h"
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//#define DEBUG_Asm
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#ifdef DEBUG_Asm
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#include <iostream>
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#define DEBUG_MSG(msg) std::cerr << "[Asm Debug] " << msg << std::endl
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#else
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#define DEBUG_MSG(msg)
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#endif
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namespace mir {
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namespace {
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const FrameSlot& GetFrameSlot(const MachineFunction& function,
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const Operand& operand) {
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if (operand.GetKind() != Operand::Kind::FrameIndex) {
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throw std::runtime_error(FormatError("mir", "期望 FrameIndex 操作数"));
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}
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return function.GetFrameSlot(operand.GetFrameIndex());
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}
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void PrintStackAccess(std::ostream& os, const char* mnemonic, PhysReg reg,
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int offset) {
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//os << " " << mnemonic << " " << PhysRegName(reg) << ", [x29, #" << offset
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// << "]\n";
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// 使用 sp 相对寻址
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os << " " << mnemonic << " " << PhysRegName(reg) << ", [sp, #" << offset << "]\n";
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}
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// 打印单个操作数
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void PrintOperand(std::ostream& os, const Operand& op) {
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switch (op.GetKind()) {
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case Operand::Kind::Reg:
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os << PhysRegName(op.GetReg());
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break;
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case Operand::Kind::Imm:
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os << "#" << op.GetImm();
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break;
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case Operand::Kind::FrameIndex:
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os << "[sp, #" << op.GetFrameIndex() << "]";
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break;
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case Operand::Kind::Cond:
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os << CondCodeName(op.GetCondCode());
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break;
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case Operand::Kind::Label:
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DEBUG_MSG("label is" << op.GetLabel());
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os << op.GetLabel();
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break;
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}
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}
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// 打印单条指令
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void PrintInstruction(std::ostream& os, const MachineInstr& instr,
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const MachineFunction& function) {
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const auto& ops = instr.GetOperands();
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switch (instr.GetOpcode()) {
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case Opcode::Prologue:
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os << " stp x29, x30, [sp, #-16]!\n";
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os << " mov x29, sp\n";
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if (function.GetFrameSize() > 0) {
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os << " sub sp, sp, #" << function.GetFrameSize() << "\n";
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}
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break;
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case Opcode::Epilogue:
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if (function.GetFrameSize() > 0) {
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os << " add sp, sp, #" << function.GetFrameSize() << "\n";
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}
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os << " ldp x29, x30, [sp], #16\n";
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break;
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case Opcode::MovImm:
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os << " mov " << PhysRegName(ops.at(0).GetReg()) << ", #"
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<< ops.at(1).GetImm() << "\n";
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break;
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case Opcode::MovReg:
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os << " mov " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::StoreStack: {
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// 检查第二个操作数的类型
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if (ops.size() >= 2 && ops.at(1).GetKind() == Operand::Kind::FrameIndex) {
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// 存储到栈槽
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const auto& slot = GetFrameSlot(function, ops.at(1));
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PrintStackAccess(os, "stur", ops.at(0).GetReg(), slot.offset);
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} else if (ops.size() >= 2 && ops.at(1).GetKind() == Operand::Kind::Reg) {
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// 间接存储：存储到寄存器指向的地址
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// STR W9, [X8]
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os << " str " << PhysRegName(ops.at(0).GetReg()) << ", ["
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<< PhysRegName(ops.at(1).GetReg()) << "]\n";
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} else {
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throw std::runtime_error("StoreStack: 无效的操作数类型");
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}
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break;
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}
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case Opcode::LoadStack: {
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// 检查第二个操作数的类型
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if (ops.size() >= 2 && ops.at(1).GetKind() == Operand::Kind::FrameIndex) {
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// 从栈槽加载
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const auto& slot = GetFrameSlot(function, ops.at(1));
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PrintStackAccess(os, "ldur", ops.at(0).GetReg(), slot.offset);
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} else if (ops.size() >= 2 && ops.at(1).GetKind() == Operand::Kind::Reg) {
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// 间接加载：从寄存器指向的地址加载
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// LDR W9, [X8]
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os << " ldr " << PhysRegName(ops.at(0).GetReg()) << ", ["
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<< PhysRegName(ops.at(1).GetReg()) << "]\n";
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} else {
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throw std::runtime_error("LoadStack: 无效的操作数类型");
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}
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break;
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}
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case Opcode::StoreStackPair:
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// stp x29, x30, [sp, #-16]!
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os << " stp " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", [sp";
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if (ops.size() > 2 && ops.at(2).GetKind() == Operand::Kind::Imm) {
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int offset = ops.at(2).GetImm();
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os << ", #" << offset;
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}
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os << "]!\n"; // 注意添加 ! 表示 pre-index
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break;
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case Opcode::LoadStackPair:
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// ldp x29, x30, [sp], #16
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os << " ldp " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", [sp]";
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if (ops.size() > 2 && ops.at(2).GetKind() == Operand::Kind::Imm) {
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int offset = ops.at(2).GetImm();
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os << ", #" << offset;
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}
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os << "\n";
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break;
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case Opcode::AddRR:
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os << " add " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::AddRI:
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os << " add " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", #"
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<< ops.at(2).GetImm() << "\n";
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break;
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case Opcode::SubRR:
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os << " sub " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::SubRI:
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os << " sub " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", #"
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<< ops.at(2).GetImm() << "\n";
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break;
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case Opcode::MulRR:
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os << " mul " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::SDivRR:
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os << " sdiv " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::UDivRR:
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os << " udiv " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FAddRR:
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os << " fadd " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FSubRR:
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os << " fsub " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FMulRR:
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os << " fmul " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::FDivRR:
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os << " fdiv " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::CmpRR:
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os << " cmp " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::CmpRI:
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os << " cmp " << PhysRegName(ops.at(0).GetReg()) << ", #"
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<< ops.at(1).GetImm() << "\n";
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break;
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case Opcode::FCmpRR:
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os << " fcmp " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::SIToFP:
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os << " scvtf " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::FPToSI:
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os << " fcvtzs " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << "\n";
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break;
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case Opcode::ZExt:
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os << " and " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", #1\n";
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break;
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case Opcode::AndRR:
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os << " and " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::OrRR:
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os << " orr " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::EorRR:
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os << " eor " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::LslRR:
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os << " lsl " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::LsrRR:
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os << " lsr " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::AsrRR:
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os << " asr " << PhysRegName(ops.at(0).GetReg()) << ", "
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<< PhysRegName(ops.at(1).GetReg()) << ", "
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<< PhysRegName(ops.at(2).GetReg()) << "\n";
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break;
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case Opcode::B:
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os << " b ";
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PrintOperand(os, ops.at(0));
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os << "\n";
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break;
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case Opcode::BCond:
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os << " b.";
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PrintOperand(os, ops.at(0));
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os << " ";
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PrintOperand(os, ops.at(1));
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os << "\n";
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break;
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case Opcode::Call:
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os << " bl ";
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PrintOperand(os, ops.at(0));
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os << "\n";
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break;
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case Opcode::Ret:
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os << " ret\n";
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break;
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case Opcode::Nop:
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os << " nop\n";
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break;
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case Opcode::Label:
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os << ops.at(0).GetLabel() << ":\n";
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break;
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default:
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os << " // unknown instruction\n";
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break;
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}
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}
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// 打印单个函数（单函数版本）
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void PrintAsm(const MachineFunction& function, std::ostream& os) {
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// 输出函数标签
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os << ".text\n";
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os << ".global " << function.GetName() << "\n";
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os << ".type " << function.GetName() << ", %function\n";
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os << function.GetName() << ":\n";
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// 计算栈帧大小
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int frameSize = function.GetFrameSize();
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// 输出每个基本块
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const auto& blocks = function.GetBasicBlocks();
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bool firstBlock = true;
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for (const auto& bb : blocks) {
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DEBUG_MSG("block");
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// 输出基本块标签（非第一个基本块）
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if (!firstBlock) {
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os << bb->GetName() << ":\n";
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}
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firstBlock = false;
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// 输出基本块中的指令
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for (const auto& inst : bb->GetInstructions()) {
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DEBUG_MSG("inst");
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PrintInstruction(os, inst, function);
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}
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}
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os << ".size " << function.GetName() << ", .-" << function.GetName() << "\n";
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}
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} // namespace
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// 打印模块（模块版本）
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void PrintAsm(const MachineModule& module, std::ostream& os) {
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// 输出文件头
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os << ".arch armv8-a\n";
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os << ".text\n";
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DEBUG_MSG("module");
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// 遍历所有函数，输出汇编
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for (const auto& func : module.GetFunctions()) {
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DEBUG_MSG("func");
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PrintAsm(*func, os);
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os << "\n";
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}
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}
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} // namespace mir
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