diff --git a/src/mir/Lowering.cpp b/src/mir/Lowering.cpp index 2efce285..6242b004 100644 --- a/src/mir/Lowering.cpp +++ b/src/mir/Lowering.cpp @@ -344,13 +344,30 @@ namespace mir scalar_slots, array_slots, block); // 立即数折叠:常量 rhs 直接用 CmpImm + // 常量 lhs 则交换并翻转条件 int cmp_imm = 0; + CondCode cond = GetCondCodeForCompareOpcode(bin->GetOpcode()); if (TryGetConstantInt(bin->GetRhs(), cmp_imm) && static_cast(cmp_imm) <= 4095) { block.Append(Opcode::CmpImm, {Operand::VReg(lhs, VRegClass::Int), Operand::Imm(cmp_imm)}); } + else if (TryGetConstantInt(bin->GetLhs(), cmp_imm) && static_cast(cmp_imm) <= 4095) + { + // 交换:cmp rhs, #lhs 并翻转条件 + block.Append(Opcode::CmpImm, + {Operand::VReg(rhs, VRegClass::Int), + Operand::Imm(cmp_imm)}); + switch (cond) + { + case CondCode::LT: cond = CondCode::GT; break; + case CondCode::LE: cond = CondCode::GE; break; + case CondCode::GT: cond = CondCode::LT; break; + case CondCode::GE: cond = CondCode::LE; break; + default: break; + } + } else { block.Append(Opcode::CmpRR, @@ -359,7 +376,7 @@ namespace mir int dst = function.CreateVReg(VRegClass::Int); block.Append(Opcode::CSet, {Operand::VReg(dst, VRegClass::Int), - Operand::Imm(static_cast(GetCondCodeForCompareOpcode(bin->GetOpcode())))}); + Operand::Imm(static_cast(cond))}); value_vregs[value] = dst; return dst; }