From 667c342c51dbef97ce8d384ced32dd778232d6f3 Mon Sep 17 00:00:00 2001
From: lzkk <956449176@qq.com>
Date: Thu, 28 May 2026 01:29:26 +0800
Subject: [PATCH] =?UTF-8?q?perf(mir):=20Lowering=20=E7=AB=8B=E5=8D=B3?=
 =?UTF-8?q?=E6=95=B0=E6=8A=98=E5=8F=A0=E2=80=94=E2=80=94AddRR/SubRR/CmpRR?=
 =?UTF-8?q?=20=E5=B8=B8=E9=87=8F=20rhs=20=E7=9B=B4=E6=8E=A5=E7=94=A8=20Imm?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

值 0-4095 可直接嵌入 add/sub/cmp，省去一条 MovImm。
配合 IR 迭代常量折叠生效。
---
 src/mir/Lowering.cpp | 33 +++++++++++++++++++++++++++++++--
 1 file changed, 31 insertions(+), 2 deletions(-)

diff --git a/src/mir/Lowering.cpp b/src/mir/Lowering.cpp
index 679eb75c..b2dc8772 100644
--- a/src/mir/Lowering.cpp
+++ b/src/mir/Lowering.cpp
@@ -342,8 +342,20 @@ namespace mir
                                 scalar_slots, array_slots, block);
           int rhs = EmitIntValue(bin->GetRhs(), function, value_vregs,
                                 scalar_slots, array_slots, block);
-          block.Append(Opcode::CmpRR,
-                       {Operand::VReg(lhs, VRegClass::Int), Operand::VReg(rhs, VRegClass::Int)});
+
+          // 立即数折叠：常量 rhs 直接用 CmpImm
+          int cmp_imm = 0;
+          if (TryGetConstantInt(bin->GetRhs(), cmp_imm) && static_cast<unsigned int>(cmp_imm) <= 4095)
+          {
+            block.Append(Opcode::CmpImm,
+                         {Operand::VReg(lhs, VRegClass::Int),
+                          Operand::Imm(cmp_imm)});
+          }
+          else
+          {
+            block.Append(Opcode::CmpRR,
+                         {Operand::VReg(lhs, VRegClass::Int), Operand::VReg(rhs, VRegClass::Int)});
+          }
           int dst = function.CreateVReg(VRegClass::Int);
           block.Append(Opcode::CSet,
                        {Operand::VReg(dst, VRegClass::Int),
@@ -650,6 +662,23 @@ namespace mir
           }
         }
 
+        // 立即数折叠：AddRR/SubRR 的操作数 2 如果是常量且 <=4095，直接用 Imm
+        int imm_val = 0;
+        if ((opcode == Opcode::AddRR || opcode == Opcode::SubRR) &&
+            TryGetConstantInt(bin->GetRhs(), imm_val))
+        {
+          int abs_val = imm_val >= 0 ? imm_val : -imm_val;
+          if (abs_val <= 4095)
+          {
+            block.Append(opcode,
+                         {Operand::VReg(dst, VRegClass::Int),
+                          Operand::VReg(lhs, VRegClass::Int),
+                          Operand::Imm(imm_val)});
+            value_vregs[value] = dst;
+            return dst;
+          }
+        }
+
         block.Append(opcode,
                      {Operand::VReg(dst, VRegClass::Int),
                       Operand::VReg(lhs, VRegClass::Int),