feat(backend): eliminate redundant MovReg after register allocation\n\nScans all blocks after RewriteWithAllocation and removes MovReg\ninstructions where source and destination are the same physical\nregister. This cleans up cases where move coalescing successfully\nassigned the same register to both sides.

src/mir/RegAlloc.cpp

@@ -1404,6 +1404,28 @@ namespace mir
         }
       }
       RewriteWithAllocation(function, gp_assign, fp_assign, all_spilled, vreg_def_inst);
+
+      // 消除冗余 MovReg（源和目标分配到同一物理寄存器）
+      for (auto &block : function.GetBlocks())
+      {
+        auto &insts = block->GetInstructions();
+        std::vector<MachineInstr> filtered;
+        filtered.reserve(insts.size());
+        for (auto &inst : insts)
+        {
+          if (inst.GetOpcode() == Opcode::MovReg)
+          {
+            const auto &ops = inst.GetOperands();
+            if (ops.size() >= 2 &&
+                ops[0].GetKind() == Operand::Kind::Reg &&
+                ops[1].GetKind() == Operand::Kind::Reg &&
+                ops[0].GetReg() == ops[1].GetReg())
+              continue;
+          }
+          filtered.push_back(std::move(inst));
+        }
+        insts = std::move(filtered);
+      }
     }
 
   } // namespace