try to fix interrupt & deadlock on RV32

crate/process/src/interrupt.rs

@@ -10,8 +10,8 @@ pub unsafe fn disable_and_store() -> usize {
 #[cfg(target_arch = "riscv32")]
 pub unsafe fn disable_and_store() -> usize {
     let sstatus: usize;
-    asm!("csrrci $0, 0x100, 1" : "=r"(sstatus));
+    asm!("csrrci $0, 0x100, 2" : "=r"(sstatus));
-    sstatus & 1
+    sstatus & 2
 }
 
 #[inline(always)]

crate/process/src/processor.rs

@@ -92,7 +92,10 @@ impl Processor {
     }
 
     pub fn tick(&self) {
+        let flags = unsafe { interrupt::disable_and_store() };
         let need_reschedule = self.manager().tick(self.pid());
+        unsafe { interrupt::restore(flags); }
+
         if need_reschedule {
             self.yield_now();
         }

kernel/src/logging.rs

@@ -1,6 +1,6 @@
 use core::fmt;
 use log::{self, Level, LevelFilter, Log, Metadata, Record};
-use spin::Mutex;
+use crate::sync::SpinNoIrqLock as Mutex;
 use lazy_static::lazy_static;
 
 lazy_static! {