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@ -16,6 +16,8 @@ pub fn init() {
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stvec::write(__alltraps as usize, stvec::TrapMode::Direct);
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stvec::write(__alltraps as usize, stvec::TrapMode::Direct);
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// Enable IPI
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// Enable IPI
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sie::set_ssoft();
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sie::set_ssoft();
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// Enable serial interrupt
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sie::set_sext();
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}
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}
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info!("interrupt: init end");
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info!("interrupt: init end");
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}
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}
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@ -44,6 +46,7 @@ pub extern fn rust_trap(tf: &mut TrapFrame) {
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use super::riscv::register::scause::{Trap, Interrupt as I, Exception as E};
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use super::riscv::register::scause::{Trap, Interrupt as I, Exception as E};
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trace!("Interrupt @ CPU{}: {:?} ", super::cpu::id(), tf.scause.cause());
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trace!("Interrupt @ CPU{}: {:?} ", super::cpu::id(), tf.scause.cause());
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match tf.scause.cause() {
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match tf.scause.cause() {
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Trap::Interrupt(I::SupervisorExternal) => serial(),
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Trap::Interrupt(I::SupervisorSoft) => ipi(),
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Trap::Interrupt(I::SupervisorSoft) => ipi(),
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Trap::Interrupt(I::SupervisorTimer) => timer(),
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Trap::Interrupt(I::SupervisorTimer) => timer(),
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Trap::Exception(E::IllegalInstruction) => illegal_inst(tf),
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Trap::Exception(E::IllegalInstruction) => illegal_inst(tf),
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@ -53,6 +56,10 @@ pub extern fn rust_trap(tf: &mut TrapFrame) {
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trace!("Interrupt end");
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trace!("Interrupt end");
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}
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}
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fn serial() {
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::trap::serial(super::io::getchar());
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}
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fn ipi() {
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fn ipi() {
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debug!("IPI");
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debug!("IPI");
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super::bbl::sbi::clear_ipi();
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super::bbl::sbi::clear_ipi();
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