Use phys_to_virt and virt_to_phys to replace the use of KERNEL_OFFSET

kernel/src/arch/riscv32/board/rocket_chip/mod.rs

@@ -1,20 +1,20 @@
-use super::consts::KERNEL_OFFSET;
+use crate::memory::phys_to_virt;
 
 /// Mask all external interrupt except serial.
 pub unsafe fn init_external_interrupt() {
-    const HART0_S_MODE_INTERRUPT_ENABLES: *mut u64 = (KERNEL_OFFSET + 0x0C00_2080) as *mut u64;
+    const HART0_S_MODE_INTERRUPT_ENABLES: *mut u64 = phys_to_virt(0x0C00_2080) as *mut u64;
     // enable all external interrupts
     HART0_S_MODE_INTERRUPT_ENABLES.write_volatile(0xf);
 
     // mask interrupts first
-    const AXI_INTC_IER: *mut u32 = (KERNEL_OFFSET + 0x1810_0008) as *mut u32;
+    const AXI_INTC_IER: *mut u32 = phys_to_virt(0x6120_0008) as *mut u32;
     AXI_INTC_IER.write_volatile(0x0);
 
     // acknowledge all interrupts
-    const AXI_INTC_IAR: *mut u32 = (KERNEL_OFFSET + 0x1810_000C) as *mut u32;
+    const AXI_INTC_IAR: *mut u32 = phys_to_virt(0x6120_000C) as *mut u32;
     AXI_INTC_IAR.write_volatile(0xffffffff);
 
-    const AXI_INTC_MER: *mut u32 = (KERNEL_OFFSET + 0x1810_001C) as *mut u32;
+    const AXI_INTC_MER: *mut u32 = phys_to_virt(0x6120_001C) as *mut u32;
     // Hardware Interrupt enable | Enable irq output
     AXI_INTC_MER.write_volatile(0b11);
 
@@ -25,20 +25,19 @@ pub unsafe fn init_external_interrupt() {
 /// Claim and complete external interrupt by reading and writing to
 /// PLIC Interrupt Claim/Complete Register.
 pub unsafe fn handle_external_interrupt() {
-    const HART0_S_MODE_INTERRUPT_CLAIM_COMPLETE: *mut u32 =
+    const HART0_S_MODE_INTERRUPT_CLAIM_COMPLETE: *mut u32 = phys_to_virt(0x0C20_1004) as *mut u32;
-        (KERNEL_OFFSET + 0x0C20_1004) as *mut u32;
     // claim
     let source = HART0_S_MODE_INTERRUPT_CLAIM_COMPLETE.read_volatile();
     // complete
     HART0_S_MODE_INTERRUPT_CLAIM_COMPLETE.write_volatile(source);
 
     // acknowledge all interrupts
-    const AXI_INTC_IAR: *mut u32 = (KERNEL_OFFSET + 0x1810_000C) as *mut u32;
+    const AXI_INTC_IAR: *mut u32 = phys_to_virt(0x6120_000C) as *mut u32;
     AXI_INTC_IAR.write_volatile(0xffffffff);
 }
 
 pub unsafe fn enable_serial_interrupt() {
-    const SERIAL_BASE: *mut u32 = (KERNEL_OFFSET + 0x18000000) as *mut u32;
+    const SERIAL_BASE: *mut u32 = phys_to_virt(0x60000000) as *mut u32;
     const UART_CTRL_REG: usize = 3;
     // Intr enable | rx reset | tx reset
     const UART_IE: u32 = 0x13;

kernel/src/arch/riscv32/board/u540/mod.rs

@@ -1,8 +1,9 @@
 use super::consts::KERNEL_OFFSET;
+use crate::memory::phys_to_virt;
 
 /// Mask all external interrupt except serial.
 pub unsafe fn init_external_interrupt() {
-    const HART1_S_MODE_INTERRUPT_ENABLES: *mut u64 = (KERNEL_OFFSET + 0x0C00_2100) as *mut u64;
+    const HART1_S_MODE_INTERRUPT_ENABLES: *mut u64 = phys_to_virt(0x0C00_2100) as *mut u64;
     const SERIAL: u64 = 4;
     HART1_S_MODE_INTERRUPT_ENABLES.write_volatile(1 << SERIAL);
 }
@@ -10,8 +11,7 @@ pub unsafe fn init_external_interrupt() {
 /// Claim and complete external interrupt by reading and writing to
 /// PLIC Interrupt Claim/Complete Register.
 pub unsafe fn handle_external_interrupt() {
-    const HART1_S_MODE_INTERRUPT_CLAIM_COMPLETE: *mut u32 =
+    const HART1_S_MODE_INTERRUPT_CLAIM_COMPLETE: *mut u32 = phys_to_virt(0x0C20_2004) as *mut u32;
-        (KERNEL_OFFSET + 0x0C20_2004) as *mut u32;
     // claim
     let source = HART1_S_MODE_INTERRUPT_CLAIM_COMPLETE.read_volatile();
     // complete
@@ -19,7 +19,7 @@ pub unsafe fn handle_external_interrupt() {
 }
 
 pub unsafe fn enable_serial_interrupt() {
-    const SERIAL_BASE: *mut u8 = (KERNEL_OFFSET + 0x10010000) as *mut u8;
+    const SERIAL_BASE: *mut u8 = phys_to_virt(0x10010000) as *mut u8;
     const UART_REG_IE: usize = 4;
     const UART_RXWM: u8 = 0x2;
     SERIAL_BASE.add(UART_REG_IE).write_volatile(UART_RXWM);

kernel/src/arch/riscv32/board/virt/mod.rs

@@ -1,4 +1,3 @@
-use super::consts::KERNEL_OFFSET;
 use crate::memory::phys_to_virt;
 
 /// Mask all external interrupt except serial.

kernel/src/arch/riscv32/mod.rs

@@ -20,13 +20,13 @@ mod sbi;
 pub mod syscall;
 pub mod timer;
 
-use self::consts::{KERNEL_OFFSET, MEMORY_OFFSET};
+use crate::memory::phys_to_virt;
 use core::sync::atomic::{AtomicBool, Ordering};
 use log::*;
 
 #[no_mangle]
 pub extern "C" fn rust_main(hartid: usize, device_tree_paddr: usize) -> ! {
-    let mut device_tree_vaddr = device_tree_paddr - MEMORY_OFFSET + KERNEL_OFFSET;
+    let mut device_tree_vaddr = phys_to_virt(device_tree_paddr);
 
     unsafe {
         cpu::set_cpu_id(hartid);

kernel/src/arch/x86_64/interrupt/mod.rs

@@ -5,7 +5,6 @@ mod trapframe;
 
 pub use self::handler::*;
 pub use self::trapframe::*;
-use crate::consts::KERNEL_OFFSET;
 use crate::memory::phys_to_virt;
 use apic::*;
 

kernel/src/arch/x86_64/ipi.rs

@@ -1,6 +1,5 @@
 /// Interface for inter-processor interrupt.
 /// This module wraps inter-processor interrupt into a broadcast-calling style.
-use crate::consts::KERNEL_OFFSET;
 use alloc::boxed::{Box, FnBox};
 use alloc::sync::Arc;
 use apic::{LocalApic, XApic, LAPIC_ADDR};
@@ -9,7 +8,7 @@ use core::sync::atomic::{spin_loop_hint, AtomicU8, Ordering};
 pub type IPIEventItem = Box<FnBox()>;
 
 unsafe fn get_apic() -> XApic {
-    let mut lapic = unsafe { XApic::new(KERNEL_OFFSET + LAPIC_ADDR) };
+    let mut lapic = unsafe { XApic::new(phys_to_virt(LAPIC_ADDR)) };
     lapic
 }
 

kernel/src/arch/x86_64/paging.rs

@@ -1,4 +1,3 @@
-use crate::consts::KERNEL_OFFSET;
 use crate::memory::{alloc_frame, dealloc_frame, phys_to_virt};
 use core::sync::atomic::Ordering;
 use log::*;

kernel/src/drivers/bus/pci.rs

@@ -1,4 +1,3 @@
-use crate::consts::KERNEL_OFFSET;
 use crate::drivers::block::*;
 use crate::drivers::net::*;
 use crate::drivers::{Driver, DRIVERS, NET_DRIVERS};

kernel/src/drivers/bus/virtio_mmio.rs

@@ -11,14 +11,13 @@ use log::*;
 use rcore_memory::PAGE_SIZE;
 use volatile::{ReadOnly, Volatile, WriteOnly};
 
-use crate::arch::consts::{KERNEL_OFFSET, MEMORY_OFFSET};
 use crate::HEAP_ALLOCATOR;
 
 use super::super::block::virtio_blk;
 use super::super::gpu::virtio_gpu;
 use super::super::input::virtio_input;
 use super::super::net::virtio_net;
-use crate::memory::phys_to_virt;
+use crate::memory::{phys_to_virt, virt_to_phys};
 
 // virtio 4.2.4 Legacy interface
 #[repr(C)]
@@ -95,9 +94,7 @@ impl VirtIOVirtqueue {
 
         header.queue_num.write(queue_num as u32);
         header.queue_align.write(align as u32);
-        header
+        header.queue_pfn.write((virt_to_phys(address) as u32) >> 12);
-            .queue_pfn
-            .write(((address - KERNEL_OFFSET + MEMORY_OFFSET) as u32) >> 12);
 
         // link desc together
         let desc =
@@ -145,7 +142,7 @@ impl VirtIOVirtqueue {
             desc[cur].flags.write(VirtIOVirtqueueFlag::NEXT.bits());
             desc[cur]
                 .addr
-                .write(output[i].as_ptr() as u64 - KERNEL_OFFSET as u64 + MEMORY_OFFSET as u64);
+                .write(virt_to_phys(output[i].as_ptr() as usize) as u64);
             desc[cur].len.write(output[i].len() as u32);
             prev = cur;
             cur = desc[cur].next.read() as usize;
@@ -156,7 +153,7 @@ impl VirtIOVirtqueue {
                 .write((VirtIOVirtqueueFlag::NEXT | VirtIOVirtqueueFlag::WRITE).bits());
             desc[cur]
                 .addr
-                .write(input[i].as_ptr() as u64 - KERNEL_OFFSET as u64 + MEMORY_OFFSET as u64);
+                .write(virt_to_phys(input[i].as_ptr() as usize) as u64);
             desc[cur].len.write(input[i].len() as u32);
             prev = cur;
             cur = desc[cur].next.read() as usize;
@@ -221,7 +218,7 @@ impl VirtIOVirtqueue {
         let mut output = Vec::new();
         loop {
             let flags = VirtIOVirtqueueFlag::from_bits_truncate(desc[cur].flags.read());
-            let addr = desc[cur].addr.read() as u64 - MEMORY_OFFSET as u64 + KERNEL_OFFSET as u64;
+            let addr = phys_to_virt(desc[cur].addr.read() as usize);
             let buffer =
                 unsafe { slice::from_raw_parts(addr as *const u8, desc[cur].len.read() as usize) };
             if flags.contains(VirtIOVirtqueueFlag::WRITE) {

kernel/src/drivers/gpu/virtio_gpu.rs

@@ -10,8 +10,8 @@ use log::*;
 use rcore_memory::PAGE_SIZE;
 use volatile::{ReadOnly, Volatile, WriteOnly};
 
-use crate::arch::consts::{KERNEL_OFFSET, MEMORY_OFFSET};
 use crate::arch::cpu;
+use crate::memory::virt_to_phys;
 use crate::sync::SpinNoIrqLock as Mutex;
 use crate::HEAP_ALLOCATOR;
 
@@ -279,7 +279,7 @@ fn setup_framebuffer(driver: &mut VirtIOGpu) {
         header: VirtIOGpuCtrlHdr::with_type(VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING),
         resource_id: VIRTIO_GPU_RESOURCE_ID,
         nr_entries: 1,
-        addr: (frame_buffer - KERNEL_OFFSET + MEMORY_OFFSET) as u64,
+        addr: virt_to_phys(frame_buffer) as u64,
         length: size,
         padding: 0,
     };

kernel/src/drivers/net/router.rs

@@ -18,7 +18,7 @@ use crate::net::SOCKETS;
 use crate::sync::SpinNoIrqLock as Mutex;
 
 use super::super::{DeviceType, Driver, DRIVERS, NET_DRIVERS, SOCKET_ACTIVITY};
-use crate::consts::{KERNEL_OFFSET, MEMORY_OFFSET};
+use crate::memory::phys_to_virt;
 
 const AXI_STREAM_FIFO_ISR: *mut u32 = (KERNEL_OFFSET + 0x1820_0000) as *mut u32;
 const AXI_STREAM_FIFO_IER: *mut u32 = (KERNEL_OFFSET + 0x1820_0004) as *mut u32;

kernel/src/memory.rs

@@ -59,6 +59,11 @@ pub const fn phys_to_virt(paddr: usize) -> usize {
     PHYSICAL_MEMORY_OFFSET + paddr
 }
 
+/// Convert virtual address to physical address
+pub const fn virt_to_phys(vaddr: usize) -> usize {
+    vaddr - PHYSICAL_MEMORY_OFFSET
+}
+
 #[derive(Debug, Clone, Copy)]
 pub struct GlobalFrameAlloc;