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@ -40,8 +40,7 @@ impl PageTable for ActivePageTable {
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// map the page to the frame using FrameAllocatorForRiscv
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// map the page to the frame using FrameAllocatorForRiscv
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// we may need frame allocator to alloc frame for new page table(first/second)
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// we may need frame allocator to alloc frame for new page table(first/second)
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info!("ActivePageTable: calling RecursivePageTable::map_to, va={:x}, pa={:x}, flags={:?}", page.start_address().as_usize(), frame.start_address().as_usize(), flags);
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info!("ActivePageTable: calling RecursivePageTable::map_to, va={:x}, pa={:x}, flags={:?}", page.start_address().as_usize(), frame.start_address().as_usize(), flags);
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self.0.map_to(page, frame, flags, &mut FrameAllocatorForRiscv)
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self.0.map_to(page, frame, flags, &mut FrameAllocatorForRiscv).unwrap().flush();
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.unwrap().flush();
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self.get_entry(addr).expect("fail to get entry")
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self.get_entry(addr).expect("fail to get entry")
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}
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}
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@ -88,50 +87,16 @@ impl PageTable for ActivePageTable {
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#[cfg(target_arch = "riscv64")]
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#[cfg(target_arch = "riscv64")]
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fn get_entry(&mut self, vaddr: usize) -> Option<&mut PageEntry> {
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fn get_entry(&mut self, vaddr: usize) -> Option<&mut PageEntry> {
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let vaddr = VirtAddr::new(vaddr);
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let vaddr = VirtAddr::new(vaddr);
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let root_table: &RvPageTable = unsafe { &*ROOT_PAGE_TABLE };
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let page = Page::of_addr(vaddr);
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let p3_table = if ! root_table[vaddr.p4_index()].flags().contains(EF::VALID) {
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return None
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} else {
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let p3_table = unsafe { &mut *(Page::from_page_table_indices(
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self.0.recursive_index,
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self.0.recursive_index,
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self.0.recursive_index,
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vaddr.p4_index()).start_address().as_usize() as *mut RvPageTable) };
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p3_table
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};
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let p2_table = if ! p3_table[vaddr.p3_index()].flags().contains(EF::VALID) {
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return None
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} else {
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let p2_table = unsafe { &mut *(Page::from_page_table_indices(
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self.0.recursive_index,
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self.0.recursive_index,
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vaddr.p4_index(),
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vaddr.p3_index()).start_address().as_usize() as *mut RvPageTable) };
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p2_table
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};
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let p1_table = if ! p2_table[vaddr.p2_index()].flags().contains(EF::VALID) {
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if ! self.0.is_mapped(
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return None
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vaddr.p4_index(), vaddr.p3_index(), vaddr.p2_index(), vaddr.p1_index()) {
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} else {
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return None;
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let p1_table = unsafe { &mut *(Page::from_page_table_indices(
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}
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self.0.recursive_index,
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vaddr.p4_index(),
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vaddr.p3_index(),
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vaddr.p2_index()).start_address().as_usize() as *mut RvPageTable) };
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p1_table
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};
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let page = Page::of_addr(vaddr);
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let entry = edit_entry_of(&page, |entry| *entry);
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// ???
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self.1 = PageEntry(entry, page);
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self.0.translate_page(page);
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Some(&mut self.1)
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let entry_va = VirtAddr::from_page_table_indices(RECURSIVE_INDEX,
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vaddr.p4_index(),
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vaddr.p3_index(),
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vaddr.p2_index(),
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vaddr.p1_index() << 3);
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unsafe { Some(&mut *(entry_va.as_usize() as *mut PageEntry)) }
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}
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}
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@ -145,7 +110,9 @@ impl PageTable for ActivePageTable {
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*/
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*/
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fn get_page_slice_mut<'a, 'b>(&'a mut self, addr: usize) -> &'b mut [u8] {
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fn get_page_slice_mut<'a, 'b>(&'a mut self, addr: usize) -> &'b mut [u8] {
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use core::slice;
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use core::slice;
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unsafe { slice::from_raw_parts_mut((addr & !(PAGE_SIZE - 1)) as *mut u8, PAGE_SIZE) }
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unsafe {
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slice::from_raw_parts_mut((addr & !(PAGE_SIZE - 1)) as *mut u8, PAGE_SIZE)
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}
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}
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}
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/*
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/*
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@ -173,15 +140,63 @@ impl PageTable for ActivePageTable {
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#[cfg(target_arch = "riscv32")]
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#[cfg(target_arch = "riscv32")]
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fn edit_entry_of<T>(page: &Page, f: impl FnOnce(&mut PageTableEntry) -> T) -> T {
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fn edit_entry_of<T>(page: &Page, f: impl FnOnce(&mut PageTableEntry) -> T) -> T {
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let p2_flags = unsafe { (*ROOT_PAGE_TABLE)[page.p2_index()].flags_mut() };
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let p2_table = unsafe { ROOT_PAGE_TABLE.as_mut().unwrap() };
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let p1_table = unsafe {
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&mut *(Page::from_page_table_indices(RECURSIVE_INDEX, page.p2_index()).
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start_address().as_usize() as *mut RvPageTable)
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};
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let p2_flags = p2_table[page.p2_index()].flags_mut();
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p2_flags.insert(EF::READABLE | EF::WRITABLE);
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p2_flags.insert(EF::READABLE | EF::WRITABLE);
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let entry_addr = (RECURSIVE_INDEX << 22) | (page.p2_index() << 12) | (page.p1_index() << 2);
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let ret = f(&mut p1_table[page.p1_index()]);
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let entry = unsafe { &mut *(entry_addr as *mut PageTableEntry) };
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let ret = f(entry);
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p2_flags.remove(EF::READABLE | EF::WRITABLE);
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p2_flags.remove(EF::READABLE | EF::WRITABLE);
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ret
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ret
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}
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}
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// TODO: better the gofy design
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#[cfg(target_arch = "riscv64")]
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fn edit_entry_of<T>(page: &Page, f: impl FnOnce(&mut PageTableEntry) -> T) -> T {
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let p4_table = unsafe { ROOT_PAGE_TABLE.as_mut().unwrap() };
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let p3_table = unsafe {
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&mut *(Page::from_page_table_indices(
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RECURSIVE_INDEX, RECURSIVE_INDEX, RECURSIVE_INDEX,
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page.p4_index()).start_address().as_usize() as *mut RvPageTable)
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};
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let p2_table = unsafe {
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&mut *(Page::from_page_table_indices(
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RECURSIVE_INDEX, RECURSIVE_INDEX, page.p4_index(),
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page.p3_index()).start_address().as_usize() as *mut RvPageTable)
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};
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let p1_table = unsafe {
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&mut *(Page::from_page_table_indices(
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RECURSIVE_INDEX, page.p4_index(), page.p3_index(),
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page.p2_index()).start_address().as_usize() as *mut RvPageTable)
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};
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let p4_flags = p4_table[page.p4_index()].flags_mut();
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let p3_flags = p3_table[page.p3_index()].flags_mut();
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let p2_flags = p2_table[page.p2_index()].flags_mut();
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p4_flags.insert(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p3_flags.insert(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p4_flags.remove(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p2_flags.insert(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p4_flags.insert(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p3_flags.remove(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p4_flags.remove(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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let ret = f(&mut p1_table[page.p1_index()]) ;
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p4_flags.insert(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p3_flags.insert(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p4_flags.remove(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p2_flags.remove(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p4_flags.insert(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p3_flags.remove(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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p4_flags.remove(EF::READABLE | EF::WRITABLE) ; sfence_vma_all();
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ret
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}
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// define the ROOT_PAGE_TABLE, and the virtual address of it?
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// define the ROOT_PAGE_TABLE, and the virtual address of it?
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#[cfg(target_arch = "riscv32")]
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#[cfg(target_arch = "riscv32")]
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@ -268,6 +283,7 @@ impl ActivePageTable {
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impl Entry for PageEntry {
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impl Entry for PageEntry {
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#[cfg(target_arch = "riscv64")]
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#[cfg(target_arch = "riscv64")]
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fn update(&mut self) {
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fn update(&mut self) {
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assert!(false, "can't update");
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let mut addr: usize = (self as *const _ as usize) << 9;
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let mut addr: usize = (self as *const _ as usize) << 9;
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if (addr & 0x7000_0000_0000 != 0) {
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if (addr & 0x7000_0000_0000 != 0) {
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addr |= 0xFFFF_0000_0000_0000;
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addr |= 0xFFFF_0000_0000_0000;
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